www.pudn.com > SMSC USB2.0.zip > sd.h
/*============================================================================
____________________________________________________________________________
______________________________________________
SSSS M M CCCC Standard Microsystems Corporation
S MM MM SSSS C Austin Design Center
SSS M M M S C 11000 N. Mopac Expressway
S M M SSS C Stonelake Bldg. 6, Suite 500
SSSS M M S CCCC Austin, Texas 78759
SSSS ______________________________________________
____________________________________________________________________________
Copyright(C) 1999, Standard Microsystems Corporation
All Rights Reserved.
This program code listing is proprietary to SMSC and may not be copied,
distributed, or used without a license to do so. Such license may have
Limited or Restricted Rights. Please refer to the license for further
clarification.
____________________________________________________________________________
Notice: The program contained in this listing is a proprietary trade
secret of SMSC, Hauppauge, New York, and is copyrighted
under the United States Copyright Act of 1976 as an unpublished work,
pursuant to Section 104 and Section 408 of Title XVII of the United
States code. Unauthorized copying, adaption, distribution, use, or
display is prohibited by this law.
____________________________________________________________________________
Use, duplication, or disclosure by the Government is subject to
restrictions as set forth in subparagraph(c)(1)(ii) of the Rights
in Technical Data and Computer Software clause at DFARS 52.227-7013.
Contractor/Manufacturer is Standard Microsystems Corporation,
80 Arkay Drive, Hauppauge, New York, 1178-8847.
____________________________________________________________________________
____________________________________________________________________________
sd.h - Lun Specific header for the Secure Digital Device
____________________________________________________________________________
comments tbd
____________________________________________________________________________
Revision History
Date Who Comment
________ ___ _____________________________________________________________
09/17/01 cds initial version - all xdata registers are initially defined
here. I've had mixed feelings about splitting up these
registers into the various controller specific headers, but
that may prove confusing and/or difficult to maintain, so
I think it would be best to have all the registers defined
here, then access to registers (via macros or whatever)
can be defined by a file specifically for the controller
11/27/01 cds overrode _lun_enable_mux with fmc code to enable lun data mux
without caller needing to know what specific device is at that
lun.
04/10/02 tbh added register set/clr bit macros
05/28/02 ds Made cosmetic changes to the header
============================================================================*/
//------------------------------------------------------------------------------
// flash memory controller registers
#ifndef __sd_dot_h__
#define __sd_dot_h__
#ifndef __sd_dot_c__
#define t_sd_register extern unsigned char volatile xdata
#define at_sd(__addr)
#else
#define t_sd_register unsigned char volatile xdata
#define at_sd(__addr) _at_ 0x30##__addr
#endif
typedef t_xdata_ref t_sd_register_ref;
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _sd_register_rd(__ref) ((__ref))
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _sd_register_wr(__ref, __datum) (__ref)=(__datum)
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _sd_register_setbit(__ref, __bitix) _sd_register_wr((__ref), _sd_register_rd((__ref)) |(1 << (__bitix)))
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _sd_register_clrbit(__ref, __bitix) _sd_register_wr((__ref), _sd_register_rd((__ref)) & ~(1 << (__bitix)))
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _sd_register_set_bits(__ref, __bitmsk) _sd_register_wr((__ref), _sd_register_rd((__ref)) |(__bitmsk))
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
#define _sd_register_clr_bits(__ref, __bitmsk) _sd_register_wr((__ref), _sd_register_rd((__ref)) & ~(__bitmsk))
extern unsigned char volatile xdata sdc_data; // rw SDC Data Register
extern unsigned char volatile xdata sdc_mode_ctl; // rw SDC Model Control Register
extern unsigned char volatile xdata sdc_ctl; // rw SDC Control Register
extern unsigned char volatile xdata sdc_cmd_rsp_buf[17];
extern uint8 xdata temp_buf[64];
//RCA bytes
extern uint8 xdata g_sdc_rca_h ;
extern uint8 xdata g_sdc_rca_l ;
extern uint8 xdata State;
extern uint8 xdata _sd_data_xfer_cmd;
extern uint8 xdata _sd_card_active;//This is a flag to know if the card is not responding
extern uint8 xdata _sd_data_loaded; //Tells me if the buffers are already loaded
//Some useful macros
#define _sd_copy_buf_to_xdata(); \
{ \
temp_buf[0] = _mcu_register_rd(x_sram_data); \
temp_buf[1] = _mcu_register_rd(x_sram_data); \
temp_buf[2] = _mcu_register_rd(x_sram_data); \
temp_buf[3] = _mcu_register_rd(x_sram_data); \
temp_buf[4] = _mcu_register_rd(x_sram_data); \
temp_buf[5] = _mcu_register_rd(x_sram_data); \
temp_buf[6] = _mcu_register_rd(x_sram_data); \
temp_buf[7] = _mcu_register_rd(x_sram_data); \
temp_buf[8] = _mcu_register_rd(x_sram_data); \
temp_buf[9] = _mcu_register_rd(x_sram_data); \
temp_buf[10] = _mcu_register_rd(x_sram_data); \
temp_buf[11] = _mcu_register_rd(x_sram_data); \
temp_buf[12] = _mcu_register_rd(x_sram_data); \
temp_buf[13] = _mcu_register_rd(x_sram_data); \
temp_buf[14] = _mcu_register_rd(x_sram_data); \
temp_buf[15] = _mcu_register_rd(x_sram_data); \
temp_buf[16] = _mcu_register_rd(x_sram_data); \
temp_buf[17] = _mcu_register_rd(x_sram_data); \
temp_buf[18] = _mcu_register_rd(x_sram_data); \
temp_buf[19] = _mcu_register_rd(x_sram_data); \
temp_buf[20] = _mcu_register_rd(x_sram_data); \
temp_buf[21] = _mcu_register_rd(x_sram_data); \
temp_buf[22] = _mcu_register_rd(x_sram_data); \
temp_buf[23] = _mcu_register_rd(x_sram_data); \
temp_buf[24] = _mcu_register_rd(x_sram_data); \
temp_buf[25] = _mcu_register_rd(x_sram_data); \
temp_buf[26] = _mcu_register_rd(x_sram_data); \
temp_buf[27] = _mcu_register_rd(x_sram_data); \
temp_buf[28] = _mcu_register_rd(x_sram_data); \
temp_buf[29] = _mcu_register_rd(x_sram_data); \
temp_buf[30] = _mcu_register_rd(x_sram_data); \
temp_buf[31] = _mcu_register_rd(x_sram_data); \
temp_buf[32] = _mcu_register_rd(x_sram_data); \
temp_buf[33] = _mcu_register_rd(x_sram_data); \
temp_buf[34] = _mcu_register_rd(x_sram_data); \
temp_buf[35] = _mcu_register_rd(x_sram_data); \
temp_buf[36] = _mcu_register_rd(x_sram_data); \
temp_buf[37] = _mcu_register_rd(x_sram_data); \
temp_buf[38] = _mcu_register_rd(x_sram_data); \
temp_buf[39] = _mcu_register_rd(x_sram_data); \
temp_buf[40] = _mcu_register_rd(x_sram_data); \
temp_buf[41] = _mcu_register_rd(x_sram_data); \
temp_buf[42] = _mcu_register_rd(x_sram_data); \
temp_buf[43] = _mcu_register_rd(x_sram_data); \
temp_buf[44] = _mcu_register_rd(x_sram_data); \
temp_buf[45] = _mcu_register_rd(x_sram_data); \
temp_buf[46] = _mcu_register_rd(x_sram_data); \
temp_buf[47] = _mcu_register_rd(x_sram_data); \
temp_buf[48] = _mcu_register_rd(x_sram_data); \
temp_buf[49] = _mcu_register_rd(x_sram_data); \
temp_buf[50] = _mcu_register_rd(x_sram_data); \
temp_buf[51] = _mcu_register_rd(x_sram_data); \
temp_buf[52] = _mcu_register_rd(x_sram_data); \
temp_buf[53] = _mcu_register_rd(x_sram_data); \
temp_buf[54] = _mcu_register_rd(x_sram_data); \
temp_buf[55] = _mcu_register_rd(x_sram_data); \
temp_buf[56] = _mcu_register_rd(x_sram_data); \
temp_buf[57] = _mcu_register_rd(x_sram_data); \
temp_buf[58] = _mcu_register_rd(x_sram_data); \
temp_buf[59] = _mcu_register_rd(x_sram_data); \
temp_buf[60] = _mcu_register_rd(x_sram_data); \
temp_buf[61] = _mcu_register_rd(x_sram_data); \
temp_buf[62] = _mcu_register_rd(x_sram_data); \
temp_buf[63] = _mcu_register_rd(x_sram_data); \
}
#define _sd_copy_xdata_to_buf(); \
{ \
_mcu_register_wr(x_sram_data, temp_buf[0]); \
_mcu_register_wr(x_sram_data, temp_buf[1]); \
_mcu_register_wr(x_sram_data, temp_buf[2]); \
_mcu_register_wr(x_sram_data, temp_buf[3]); \
_mcu_register_wr(x_sram_data, temp_buf[4]); \
_mcu_register_wr(x_sram_data, temp_buf[5]); \
_mcu_register_wr(x_sram_data, temp_buf[6]); \
_mcu_register_wr(x_sram_data, temp_buf[7]); \
_mcu_register_wr(x_sram_data, temp_buf[8]); \
_mcu_register_wr(x_sram_data, temp_buf[9]); \
_mcu_register_wr(x_sram_data, temp_buf[10]); \
_mcu_register_wr(x_sram_data, temp_buf[11]); \
_mcu_register_wr(x_sram_data, temp_buf[12]); \
_mcu_register_wr(x_sram_data, temp_buf[13]); \
_mcu_register_wr(x_sram_data, temp_buf[14]); \
_mcu_register_wr(x_sram_data, temp_buf[15]); \
_mcu_register_wr(x_sram_data, temp_buf[16]); \
_mcu_register_wr(x_sram_data, temp_buf[17]); \
_mcu_register_wr(x_sram_data, temp_buf[18]); \
_mcu_register_wr(x_sram_data, temp_buf[19]); \
_mcu_register_wr(x_sram_data, temp_buf[20]); \
_mcu_register_wr(x_sram_data, temp_buf[21]); \
_mcu_register_wr(x_sram_data, temp_buf[22]); \
_mcu_register_wr(x_sram_data, temp_buf[23]); \
_mcu_register_wr(x_sram_data, temp_buf[24]); \
_mcu_register_wr(x_sram_data, temp_buf[25]); \
_mcu_register_wr(x_sram_data, temp_buf[26]); \
_mcu_register_wr(x_sram_data, temp_buf[27]); \
_mcu_register_wr(x_sram_data, temp_buf[28]); \
_mcu_register_wr(x_sram_data, temp_buf[29]); \
_mcu_register_wr(x_sram_data, temp_buf[30]); \
_mcu_register_wr(x_sram_data, temp_buf[31]); \
_mcu_register_wr(x_sram_data, temp_buf[32]); \
_mcu_register_wr(x_sram_data, temp_buf[33]); \
_mcu_register_wr(x_sram_data, temp_buf[34]); \
_mcu_register_wr(x_sram_data, temp_buf[35]); \
_mcu_register_wr(x_sram_data, temp_buf[36]); \
_mcu_register_wr(x_sram_data, temp_buf[37]); \
_mcu_register_wr(x_sram_data, temp_buf[38]); \
_mcu_register_wr(x_sram_data, temp_buf[39]); \
_mcu_register_wr(x_sram_data, temp_buf[40]); \
_mcu_register_wr(x_sram_data, temp_buf[41]); \
_mcu_register_wr(x_sram_data, temp_buf[42]); \
_mcu_register_wr(x_sram_data, temp_buf[43]); \
_mcu_register_wr(x_sram_data, temp_buf[44]); \
_mcu_register_wr(x_sram_data, temp_buf[45]); \
_mcu_register_wr(x_sram_data, temp_buf[46]); \
_mcu_register_wr(x_sram_data, temp_buf[47]); \
_mcu_register_wr(x_sram_data, temp_buf[48]); \
_mcu_register_wr(x_sram_data, temp_buf[49]); \
_mcu_register_wr(x_sram_data, temp_buf[50]); \
_mcu_register_wr(x_sram_data, temp_buf[51]); \
_mcu_register_wr(x_sram_data, temp_buf[52]); \
_mcu_register_wr(x_sram_data, temp_buf[53]); \
_mcu_register_wr(x_sram_data, temp_buf[54]); \
_mcu_register_wr(x_sram_data, temp_buf[55]); \
_mcu_register_wr(x_sram_data, temp_buf[56]); \
_mcu_register_wr(x_sram_data, temp_buf[57]); \
_mcu_register_wr(x_sram_data, temp_buf[58]); \
_mcu_register_wr(x_sram_data, temp_buf[59]); \
_mcu_register_wr(x_sram_data, temp_buf[60]); \
_mcu_register_wr(x_sram_data, temp_buf[61]); \
_mcu_register_wr(x_sram_data, temp_buf[62]); \
_mcu_register_wr(x_sram_data, temp_buf[63]); \
}
#define _sd_wait_48b_resp(); \
{ \
sdc_mode_ctl = 0; \
trace1(0, sd, 0, "The stat register %02x",_mcu_register_rd(x_sdc_stat)); \
sdc_mode_ctl |= kbm_sdc_cmd_48b_rsp; \
trace1(0, sd, 0, "The sdc_mode_ctl register %02x",sdc_mode_ctl); \
sdc_wait_status_with_timeout(kbm_sdc_stat_rsp_rdy,300); \
trace1(0, sd, 0, "The stat register %02x",_mcu_register_rd(x_sdc_stat)); \
}
//Define the various bitmasks for SDC
//For the register sdc_mode_ctl (SDC_MODE_CTL)
#define kbm_sdc_sd_dat 0x20
#define kbm_sdc_rsp_crc_ds 0x10
#define kbm_sdc_mode_cmd 0x0f
#define kbm_sdc_cmd_no_rsp 0x01
#define kbm_sdc_cmd_48b_rsp 0x02
#define kbm_sdc_cmd_136b_rsp 0x04
#define kbm_sdc_cmd_dflt 0x00
//For the register sdc_ctl (SDC_CTL)
#define kbm_sdc_r2_crc_136 0x10
#define kbm_sdc_crc_dis 0x08
#define kbm_sdc_bus_type 0x04
#define kbm_sdc_id_data 0x02
#define kbm_sdc_device_type 0x01
#if (k_log_lun_sd < k_max_log_lun)
//------------------------------------------------------------------------------
// define instance method of enabling the lun mux. since thereis already
// a mechanism for doing this, I'm simply going to use it (defined in fmc.h)
// instead of wrapping a function call in this class (which is the more "OO" pure way
// of encapsulating the "class" methods) to that function.
//
// note it is a FUNCTION not a DFA!!!!
//-------------------------------------------------------------------------------
#undef _v_lun_enable_mux
#define _v_lun_enable_mux fmc_select_sdc
void sd_init_controller() reentrant;
#undef _v_lun_initialize_controller
#define _v_lun_initialize_controller sd_init_controller
//+ ----------------------------------------------------------------------------
// override dfa_lun_reset
//- ----------------------------------------------------------------------------
void dfa_sd_reset() reentrant;
#undef _v_dfa_lun_reset_media
#define _v_dfa_lun_reset_media dfa_sd_reset
//------------------------------------------------------------------------------
// override dfa_lun_initialize
//------------------------------------------------------------------------------
void dfa_sd_initialize() reentrant;
#undef _v_dfa_lun_initialize_media
#define _v_dfa_lun_initialize_media dfa_sd_initialize
//+ ------------------------------------------------------------------------------
// override msc_inquiry
//- ------------------------------------------------------------------------------
void dfa_sd_identify_device() reentrant ;
#undef _v_dfa_lun_identify_media
#define _v_dfa_lun_identify_media dfa_sd_identify_device
//+ ------------------------------------------------------------------------------
// override sd_read
//- ------------------------------------------------------------------------------
void dfa_sd_read() reentrant ;
#undef _v_dfa_lun_read
#define _v_dfa_lun_read dfa_sd_read
//+ ------------------------------------------------------------------------------
// override sd_write
//- ------------------------------------------------------------------------------
void dfa_sd_write() reentrant ;
#undef _v_dfa_lun_write
#define _v_dfa_lun_write dfa_sd_write
//+ ------------------------------------------------------------------------------
// override sd_verify
//- ------------------------------------------------------------------------------
void dfa_sd_verify(void) reentrant ;
#undef _v_dfa_lun_verify
#define _v_dfa_lun_verify dfa_sd_verify
// index into the vtbl
typedef uint8 t_sd_vtbl_ix ;
typedef enum e_sd_vtbl_entry
{
k_sd_vtbl_sz = k_lun_vtbl_sz
} ;
// sd class definition:
#define _v_sd _v_lun
// sd class vtable declaration & vtable size declaration
extern code _vtbl_decl(sd) ;
#endif
#define k_sdc_cmd_read_mult_blocks 0x52
#define k_sdc_cmd_write_mult_blocks 0x59
#define k_sdc_cmd_read_sgl_block 0x51
#define k_sdc_cmd_write_sgl_block 0x58
//sd states
#define k_sdc_state_idle 0
#define k_sdc_state_ready 1
#define k_sdc_state_ident 2
#define k_sdc_state_stby 3
#define k_sdc_state_tran 4
#define k_sdc_state_data 5
#define k_sdc_state_rcv 6
#define k_sdc_state_prg 7
#define k_sdc_state_dis 8
void sd_wait_48b_resp() reentrant;
void sd_get_status() reentrant;
void sdc_read_rsp(uint8 length) reentrant;
void sd_display_rsp_buf() reentrant;
void sd_pre_cmd() reentrant;
void sdc_wait_status_with_timeout(uint8 mask, uint16 ticks) reentrant;
void sd_pre_erase() reentrant;
t_result sdc_wait_irq_with_timeout(uint8 irq_name, uint16 ticks) reentrant;
t_result sd_read_write_end_xfer() reentrant;
t_result sd_read_write_begin_xfer() reentrant;
t_result sd_read_end_burst() reentrant;
t_result sd_read_intra_burst() reentrant;
t_result my_fmc_transfer() reentrant;
t_result sd_read_write_end_xfer() reentrant;
t_result sd_write_begin_burst() reentrant;
t_result sd_read_write_begin_split() reentrant;
#define k_single_data_line 1 /* SDC single data line */
#define k_four_data_lines 2 /* SDC four data lines */
#else
#error "warning: header included too many times!"
#endif // __sd_dot_h__