www.pudn.com > SMSC USB2.0.zip > debug.c
/*============================================================================
____________________________________________________________________________
______________________________________________
SSSS M M CCCC Standard Microsystems Corporation
S MM MM SSSS C Austin Design Center
SSS M M M S C 11000 N. Mopac Expressway
S M M SSS C Stonelake Bldg. 6, Suite 500
SSSS M M S CCCC Austin, Texas 78759
SSSS ______________________________________________
____________________________________________________________________________
Copyright(C) 1999, Standard Microsystems Corporation
All Rights Reserved.
This program code listing is proprietary to SMSC and may not be copied,
distributed, or used without a license to do so. Such license may have
Limited or Restricted Rights. Please refer to the license for further
clarification.
____________________________________________________________________________
Notice: The program contained in this listing is a proprietary trade
secret of SMSC, Hauppauge, New York, and is copyrighted
under the United States Copyright Act of 1976 as an unpublished work,
pursuant to Section 104 and Section 408 of Title XVII of the United
States code. Unauthorized copying, adaption, distribution, use, or
display is prohibited by this law.
____________________________________________________________________________
Use, duplication, or disclosure by the Government is subject to
restrictions as set forth in subparagraph(c)(1)(ii) of the Rights
in Technical Data and Computer Software clause at DFARS 52.227-7013.
Contractor/Manufacturer is Standard Microsystems Corporation,
80 Arkay Drive, Hauppauge, New York, 1178-8847.
____________________________________________________________________________
____________________________________________________________________________
-
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debug code for 210 fmc-specific applications
____________________________________________________________________________
Revision History
Date Who Comment
________ ___ _____________________________________________________________
04/20/01 cds initial version
============================================================================*/
#include "project.h"
#if 1
xdata uint16 dbg_i ; // make sure the loop var is OFF the stack and NOT in data/idata space
xdata uint8 dbg_pre ;
xdata uint8 dbg_post ;
#define IBYTE ((unsigned char volatile idata *) 0)
void dbg_test_idata() reentrant
{
mcu_begin_critical_section() ;
//------------------------------------------------------------------------------
// 1 dumps out idata from 80 to ff and corresponding sfr registers in that range.
//------------------------------------------------------------------------------
#if 1 // test #1
TRACE0(518, dbg, 0, "*** testing idata/sfr decoding ***") ;
for(dbg_i=0x80; dbg_i<=0xff;dbg_i+=2)
{
TRACE2(519, dbg, 0, "idata[%02X]:%04X", dbg_i, IBYTE[dbg_i]) ;
}
for(dbg_i=0x80; dbg_i<=0xff;dbg_i++)
{
dbg_dump_sfr(dbg_i) ;
}
#endif
//------------------------------------------------------------------------------
// 2 tries writing to idata between 70 and b0 checking for corrupted sfr on each
// write
//------------------------------------------------------------------------------
#if 0 // test #2
TRACE0(520, dbg, 0, "*** writing data 0x71 thru data 0xB0 (avoid trashing stack)") ;
for(dbg_i=0x70;dbg_i<=0xb0;dbg_i++)
{
dbg_pre=dbg_sfr_register_rd(dbg_i) ;
IBYTE16[dbg_i] = (uint16) (dbg_i|((0x00ff-dbg_i)<<8)) ;
dbg_post=dbg_sfr_register_rd(dbg_i) ;
if(dbg_pre!=dbg_post)
{
TRACE3(521, dbg, 0, "*** sfr at %02x changed after writing to idata. pre:%02x, post:%02x ***", dbg_i, dbg_pre, dbg_post) ;
dbg_dump_sfr(dbg_i) ;
}
else
{
TRACE1(522, dbg, 0, "sfr[%d] ok", dbg_i) ;
}
}
#endif // test #2
//------------------------------------------------------------------------------
// 3 fetches the sfr register at sfr address equal to g_thread[1].bits_got
// then dumps the sfr values, calls the felonious function, the dumps the sfr
// values once more to see if the sfr at that address was corrupted.
// the dbg_dump_sfr and dbg_sfr_register_rd functions have been moved into
// minimos since they seem mildly useful in that you can access the sfrs
// pseudo-array style.
//------------------------------------------------------------------------------
#if 1 // test #3
TRACE1(523, dbg, 0, " addr g_thread[1].bits_got:%04x",(uint16)(&(g_thread[1].bits_got)) ) ;
g_tid=1 ; /* bad bad bad form... but need to set this value to make sure it's correct before calling the function */
TRACE1(524, dbg, 0, "*** g_thread[1].bits_got:%04x", g_thread[1].bits_got);
g_thread[1].bits_got = 0xffff;
TRACE1(525, dbg, 0, "*** g_thread[1].bits_got:%04x", g_thread[1].bits_got);
/* we're going to die anyway, so just remember to remove this */
dbg_dump_sfr( (uint8) (&(g_thread[1].bits_got))-1) ;
dbg_dump_sfr( (uint8) (&(g_thread[1].bits_got))) ;
dbg_dump_sfr( (uint8) (&(g_thread[1].bits_got))+1) ;
TRACE0(526, dbg, 0, "*** calling function thread_clr_sync(0x5555). ***") ;
thread_clr_sync(0x5555) ;
dbg_dump_sfr( (uint8) (&(g_thread[1].bits_got))-1) ;
dbg_dump_sfr( (uint8) (&(g_thread[1].bits_got))) ;
dbg_dump_sfr( (uint8) (&(g_thread[1].bits_got))+1) ;
TRACE1(527, dbg, 0, "*** g_thread[1].bits_got:%04x", g_thread[1].bits_got);
#endif // test 3
// since we've basically blown away all valid register data, screetch to a halt
// to analyze the results.
thread_halt() ;
mcu_end_critical_section() ;
}
#endif