www.pudn.com > sn068s.zip > MEMMAP.NI

%ifndef SNEeSe_memmap_i 
%define SNEeSe_memmap_i 
 
%include "misc.ni" 
 
; Read Low RAM - 0000-1FFF in 00-3F/80-BF 
%macro LOW_RAM_READ 0 
    mov edi,0x1FFF 
    and edi,ebx 
    mov al,[_WRAM+edi] 
    ret 
%endmacro 
 
; Write Low RAM - 0000-1FFF in 00-3F/80-BF 
%macro LOW_RAM_WRITE 0 
    mov edi,0x1FFF 
    and edi,ebx 
    mov [_WRAM+edi],al 
    ret 
%endmacro 
 
; Read hardware - 2000-5FFF in 00-3F/80-BF 
%macro PPU_READ 0 
    mov edi,0xFFFF 
    and edi,ebx 
    jmp [(_Read_Map_20_5F-0x2000*4)+edi*4] 
%endmacro 
 
; Write hardware - 2000-5FFF in 00-3F/80-BF 
%macro PPU_WRITE 0 
    mov edi,0xFFFF 
    and edi,ebx 
    jmp [(_Write_Map_20_5F-0x2000*4)+edi*4] 
%endmacro 
 
; Read hardware - 2100-21FF in 00-3F/80-BF 
%macro PPU_21_READ 0 
    mov edi,0xFF 
    and edi,ebx 
    jmp [_Read_Map_21+edi*4] 
%endmacro 
 
; Write hardware - 2100-21FF in 00-3F/80-BF 
%macro PPU_21_WRITE 0 
    mov edi,0xFF 
    and edi,ebx 
    jmp [_Write_Map_21+edi*4] 
%endmacro 
 
; Read hardware - 4000-40FF in 00-3F/80-BF 
%macro PPU_40_READ 0 
    mov edi,0xFF 
    and edi,ebx 
    jmp [_Read_Map_40+edi*4] 
%endmacro 
 
; Write hardware - 4000-40FF in 00-3F/80-BF 
%macro PPU_40_WRITE 0 
    mov edi,0xFF 
    and edi,ebx 
    jmp [_Write_Map_40+edi*4] 
%endmacro 
 
; Read hardware - 4200-42FF in 00-3F/80-BF 
%macro PPU_42_READ 0 
    mov edi,0xFF 
    and edi,ebx 
    jmp [_Read_Map_42+edi*4] 
%endmacro 
 
; Write hardware - 4200-42FF in 00-3F/80-BF 
%macro PPU_42_WRITE 0 
    mov edi,0xFF 
    and edi,ebx 
    jmp [_Write_Map_42+edi*4] 
%endmacro 
 
; Read hardware - 4300-43FF in 00-3F/80-BF 
%macro PPU_43_READ 0 
    mov edi,0xFF 
    and edi,ebx 
    jmp [_Read_Map_43+edi*4] 
%endmacro 
 
; Write hardware - 4300-43FF in 00-3F/80-BF 
%macro PPU_43_WRITE 0 
    mov edi,0xFF 
    and edi,ebx 
    jmp [_Write_Map_43+edi*4] 
%endmacro 
 
; Read from ROM address space not containing ROM 
%macro NO_ROM_READ 0 
    mov al,0xFF 
    ret 
%endmacro 
 
; Write to ROM address space 
%macro ROM_WRITE 0 
    ret 
%endmacro 
 
; Read HiROM SRAM 30-3F 
%macro SRAM30_READ 1    ;num 
    mov edi,[_SRAM_Mask] 
    and edi,ebx 
    mov al,[(_SRAM+((0x%1-0x30)*0x2000))+edi] 
    ret 
%endmacro 
 
; Write HiROM SRAM 30-3F 
%macro SRAM30_WRITE 1   ;num 
    mov edi,[_SRAM_Mask] 
    and edi,ebx 
    mov [(_SRAM+((0x%1-0x30)*0x2000))+edi],al 
    ret 
%endmacro 
 
; Read HiROM SRAM B0-BF 
%macro SRAMB0_READ 1    ;num 
    mov edi,[_SRAM_Mask] 
    and edi,ebx 
    mov al,[(_SRAM+((0x%1-0xB0)*0x2000))+edi] 
    ret 
%endmacro 
 
; Write HiROM SRAM B0-BF 
%macro SRAMB0_WRITE 1   ;num 
    mov edi,[_SRAM_Mask] 
    and edi,ebx 
    mov [(_SRAM+((0x%1-0xB0)*0x2000))+edi],al 
    ret 
%endmacro 
 
; Write HiROM SRAM 2k 30-3F/B0-BF 
%macro SRAM_HWRITE_2k 0 
    mov edi,2048 - 1 
    and edi,ebx 
    mov [_SRAM+edi],al 
    mov [_SRAM+edi+2048],al 
    mov [_SRAM+edi+4096],al 
    mov [_SRAM+edi+6144],al 
    ret 
%endmacro 
 
; Write HiROM SRAM 4k 30-3F/B0-BF 
%macro SRAM_HWRITE_4k 0 
    mov edi,4096 - 1 
    and edi,ebx 
    mov [_SRAM+edi],al 
    mov [_SRAM+edi+4096],al 
    ret 
%endmacro 
 
; Non-mapped/unsupported read 
%macro NON_MAPPED_READ 0 
    mov al,0xFF 
    ret 
%endmacro 
 
; Non-mapped/unsupported write 
%macro NON_MAPPED_WRITE 0 
    ret 
%endmacro 
 
%endif ;!SNEeSe_memmap_i