www.pudn.com > 4510b_dma.rar > dma.c
/*************************************************************************/ /* */ /* FILE NAME VERSION */ /* */ /* DMA.c KS32C50100 : version 1.0 */ /* */ /* COMPONENT */ /* */ /* */ /* */ /* DESCRIPTION */ /* */ /* */ /* AUTHOR */ /* */ /* */ /* DATA STRUCTURES */ /* */ /* */ /* FUNCTIONS */ /* */ /* Evalution code for DMA control block */ /* */ /* DEPENDENCIES */ /* */ /* */ /* HISTORY */ /*************************************************************************/ #include#include #include #include "snds.h" #include "dma.h" #include "isr.h" #include "std.h" #include "uart.h" #include "timer.h" #include "down.h" #include "memory.h" #include "pollio.h" #include "sysconf.h" /* global variable */ volatile U32 Gdma0DoneFlag = 0 ; // GDMA Transfer done interrupt flag volatile U32 Gdma1DoneFlag = 0 ; // GDMA Transfer done interrupt flag GDMA_REG rGDMA = { 0, // Control register(CON) 0, // Source address register(SRC) 0, // Destination address register(DST) 0, // Counter register(CNT) 0 // Flag to control dialog (DIALOG) }; //Define GDMA register's structure /******************************************************************* * GDMA TEST TOP MEMU SELECT FUNCTION *******************************************************************/ void GdmaTest(void) { void PrintDmaItems(void); char items; IOPDATA= ~0x8; //in GDMA test mode SysSetInterrupt(nGDMA0_INT, GDMA0isr); SysSetInterrupt(nGDMA1_INT, GDMA1isr); SysSetInterrupt(nTIMER0_INT, tm0isr); do { PrintDmaItems(); // Main memu for cache test do { Print("\rSelect Number?_"); items = get_byte(); }while(is_space(items)); if(is_xdigit(to_upper(items))) { switch(to_upper(items)) { case '1': GDMAStartUpDialog(); break; case '2': GDMAConfigView(); break; case '3': GdmaMem2MemTest(); break; case '4': Uart2MemoryTest(SERIAL_DEV0); break; case '5': Memory2UartTest(SERIAL_DEV0); break; case '6': Uart2MemoryTest(SERIAL_DEV1); break; case '7': Memory2UartTest(SERIAL_DEV1); break; case '8': GdmaRegTest(); break; case '9': DataDownLoad(); break; case 'A': ExtGdmaReqTest(); break; default : break; } } Print("\rPress any key to continue.\r"); while(!is_space(get_byte())); } while((items!='q')&&(items!='Q')); } /* * Display GDMA test items * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */ void PrintDmaItems(void) { Print("\n\n"); Print("+---------------------------------------------------+\r") ; Print("| KS32C50100 GDMA TEST ITEMS |\r") ; Print("+---------------------------------------------------+\r") ; Print("| 1. GDMA start up dialog for setup DMA mode. |\r") ; Print("| 2. GDMA configurations viewer. |\r") ; Print("| 3. GDMA Memory to Memory test. |\r") ; Print("| 4. GDMA Uart0 to Memory transfer test. |\r") ; Print("| 5. GDMA Memory to Uart0 transfer test. |\r") ; Print("| 6. GDMA Uart1 to Memory transfer test. |\r") ; Print("| 7. GDMA Memory to Uart1 transfer test. |\r") ; Print("| 8. GDMA Register Read/Write test. |\r") ; Print("| 9. UART0 to Memory data transfer through GDMA0. |\r") ; Print("| A. External GDMA Request Test. |\r") ; Print("| Q. QUIT - Return to main menu. |\r") ; Print("+---------------------------------------------------+\r") ; } /******************************************************************/ /* GDMA STARTUP DIALOG */ /******************************************************************/ void GDMAStartUpDialog(void) { char c; int i; /* Initialize GDMA global registers */ rGDMA.CON = 0; rGDMA.SRC = 0; rGDMA.DST = 0; rGDMA.CNT = 0; rGDMA.DIALOG =1; /* STARTUP DIALOG FOR UART CONFIGURATION */ Print("\r\r>>> STARTUP DIALOG FOR GDMA CONFIGURATION <<<\r\r"); do { Print(" > MODE SELECTION MENU <\r"); Print(" --------------------------\r"); Print(" 0. SoftWare.\r"); Print(" 1. External EXTDREQ.\r"); Print(" 2. UART0.\r"); Print(" 3. UART1.\r"); Print(" --------------------------\r"); Print("$ Select Number.> "); i = get_number(); get_byte(); //dummy for carrige return } while(i > 3); switch(i) { case 1: rGDMA.CON |= GDMA_EXTDREQ; break; case 2: rGDMA.CON |= GDMA_U0MODE; break; case 3: rGDMA.CON |= GDMA_U1MODE; break; default: rGDMA.CON |= GDMA_MEM2MEM; } /* * Address Direction menu */ Print("\r\r>>>Abstract for Select Menu.\r\r"); Print("------------------------------------------\r"); Print("-Source Address : SrcAddr, \r"); Print("-Destination Address : DstAddr, \r"); Print("-Address Increase : ++SrcAddr,++DstAddr, \r"); Print("-Address Decrease : --SrcAddr,--DstAddr, \r"); Print("------------------------------------------\r"); /* Destination address direction */ do { Print("\r$ --DstAddr[1],++DstAddr[0]?_"); c = get_byte(); } while(c!='1' && c!='0'); if(c == '1') rGDMA.CON |= GDMA_DST_DEC; /* Source address direction */ do { Print("\r$ --SrcAddr[1],++SrcAddr[0]?_"); c = get_byte(); } while(c!='1' && c!='0'); if(c == '1') rGDMA.CON |= GDMA_SRC_DEC; /* Stop interrupt enable */ do { Print("\r$ Enable stop interrupt[1/0]?_"); c = get_byte(); } while(c!='1' && c!='0'); if(c == '1') rGDMA.CON |= GDMA_INT_ENABLE; /* Transfer direction */ if((rGDMA.CON&GDMA_U0MODE)||(rGDMA.CON&GDMA_U1MODE)) { do { Print("\r> Transfer Direction(UART0/UART1 only)"); Print("\r$ Memory to UART.[1], UART to memory[0]?_"); c = get_byte(); } while(c!='1' && c!='0'); if(c == '1') { rGDMA.CON |= GDMA_MEM2UART; rGDMA.CON |= GDMA_DST_FIX; Print("\r$ Destination Addr Fixed."); } else { rGDMA.CON |= GDMA_SRC_FIX; Print("\r$ Source Addr Fixed."); } } /* Transfer width */ do { Print("\r\r> TRANSFER WIDTH MENU <\r"); Print(" -----------------------\r"); Print(" 0. Byte(8bit).\r"); Print(" 1. Halfword(16bit).\r"); Print(" 2. Word(32bit).\r"); Print(" 3. No use.\r"); Print(" -----------------------\r"); Print("$ Select Number.> "); i = get_number(); get_byte(); //dummy for carrige return } while(i > 3); switch(i) { case 0: rGDMA.CON |= GDMA_TX_BYTE; break; case 1: rGDMA.CON |= GDMA_TX_HALFWORD; break; case 2: rGDMA.CON |= GDMA_TX_WORD; break; default: rGDMA.CON |= GDMA_NO_USE; } /* GDMA Operation mode */ do { Print("\r$ Block mode[1] or Single mode[0]?_"); c = get_byte(); } while(c!='1' && c!='0'); if(c == '1') rGDMA.CON |= GDMA_BLOCK; do { Print("\r$ Continuous mode[1]?_"); c = get_byte(); } while(c!='1' && c!='0'); if(c == '1') { if((rGDMA.CON & GDMA_MEM2MEM)||(rGDMA.CON & ~GDMA_BLOCK)){ Print("\rCautious!.Continuous mode should not"); Print(" be used with single mode."); Print("\rCautious!.This mode can be used with"); Print(" software request mode."); } else rGDMA.CON |= GDMA_CONTINUOUS; } do { Print("\r$ Demand mode[1]?_"); c = get_byte(); } while(c!='1' && c!='0'); if(c == '1') { if((rGDMA.CON & GDMA_BLOCK)||(rGDMA.CON & GDMA_CONTINUOUS)) Print("\rCautious!. Block & Continuous mode must be zero."); else rGDMA.CON |= GDMA_DEMAND; } /* Setup GDMA Source/Destination address register & */ /* GDMA Transfer counter register */ switch(rGDMA.CON & GDMA_MODE){ //case GDMA_EXTDREQ: SetUpExtDreq(); break; case GDMA_U0MODE: GdmaUart0Mem(); break; case GDMA_U1MODE: GdmaUart1Mem(); break; default: GdmaMem2MemTest(); } } void GDMARegRead(unsigned gdma_channel) { if(gdma_channel) { rGDMA.CON= GDMACON1; rGDMA.SRC= GDMASRC1; rGDMA.DST= GDMADST1; rGDMA.CNT= GDMACNT1; } else { rGDMA.CON= GDMACON0; rGDMA.SRC= GDMASRC0; rGDMA.DST= GDMADST0; rGDMA.CNT= GDMACNT0; } } void GDMARegWrite(unsigned gdma_channel) { if(gdma_channel) { GDMASRC1 = rGDMA.SRC; GDMADST1 = rGDMA.DST; GDMACNT1 = rGDMA.CNT; GDMACON1 = rGDMA.CON; } else { GDMASRC0 = rGDMA.SRC; GDMADST0 = rGDMA.DST; GDMACNT0 = rGDMA.CNT; GDMACON0 = rGDMA.CON; } } void GDMARegPrint(unsigned gdma_channel) { if(gdma_channel) { Print("\r$GDMACON1[0x%08x] = 0x%08x", &GDMACON1,GDMACON1); Print("\r$GDMASRC1[0x%08x] = 0x%08x", &GDMASRC1,GDMASRC1); Print("\r$GDMADST1[0x%08x] = 0x%08x", &GDMADST1,GDMADST1); Print("\r$GDMACNT1[0x%08x] = 0x%08x", &GDMACNT1,GDMACNT1); } else { Print("\r$GDMACON0[0x%08x] = 0x%08x", &GDMACON0,GDMACON0); Print("\r$GDMASRC0[0x%08x] = 0x%08x", &GDMASRC0,GDMASRC0); Print("\r$GDMADST0[0x%08x] = 0x%08x", &GDMADST0,GDMADST0); Print("\r$GDMACNT0[0x%08x] = 0x%08x\r\r", &GDMACNT0,GDMACNT0); } } unsigned GetGdmaChannel(void) { char channel; /* Get GDMA Channel */ do { Print("\rSelect GDMA Channel[0/1]?_"); channel = get_byte(); }while(is_space(channel) && (channel != '1') && (channel != '0')); if(channel == '1') return(1); else return(0); } /******************************************************************/ /* GDMA0, GDMA1 MODULE TEST FUCNTION */ /******************************************************************/ /* * GDMA Memory to Memory test Module */ void GdmaMem2MemTest(void) { int j; int repeat; int gdma_channel; /* Get GDMA Channel */ gdma_channel = GetGdmaChannel(); /*GDMA memory to memory setup */ SetUpmem2mem(); Print("\r>>Input Memory Test repeat times[0x5]> 0x") ; repeat = get_num(); if (repeat==0) repeat=(unsigned int)DmaTestLoop; Print("\r\r - Selected GDMA channel : GDMA%d",gdma_channel); Print("\r - GDMA%d source address : 0x%08x",gdma_channel,rGDMA.SRC); Print("\r - GDMA%d destination address : 0x%08x",gdma_channel,rGDMA.DST); Print("\r - GDMA%d memory test size : 0x%08x",gdma_channel,rGDMA.CNT); Print("\r - GDMA%d Mem test repeat times: 0x%08x\r\r",gdma_channel,repeat); for(j=0;j<(repeat*3);j++) { GdmaTxWidth(j%3); //Transfer width will be changed to 8,16,32bit GdmaMem2MemTestSub(gdma_channel); Print("\r>>%dth's transfer is done!\r\r",j+1); } } int GdmaMem2MemTestSub(unsigned gdma_channel) { /* Enable Interrupt */ GdmaIntEnable(gdma_channel); /*Initialize source memory with random pattern */ MemTestInit((U32 *)rGDMA.SRC, (int)rGDMA.CNT); /* GDMA MODE SET for memory word test*/ if(!rGDMA.DIALOG) { GdmaMem2Mem(gdma_channel); //default set for mem to mem test } else { GdmaReset(gdma_channel); // GDMA related register all clear to reset state GDMARegWrite(gdma_channel); GdmaRunEnable(gdma_channel); rGDMA.DIALOG = 0; //Off diaglog } tmReset(TIMER_DEV1); tm_init(TIMER_DEV1,(ONE_SECOND/TICKS_PER_SECOND)); TimerStart(TIMER_DEV1); put_byte('\r'); if(gdma_channel) while(!Gdma1DoneFlag) DisplayGdma(gdma_channel); else while(!Gdma0DoneFlag) DisplayGdma(gdma_channel); Timer1Stop(); put_byte('\r'); PrtSysTime(TIMER_DEV1,"GDMA Transfer time"); tmReset(TIMER_DEV1); GdmaIntDisable(gdma_channel); Print("\rGDMA%d:Compare source & destination Memory...",gdma_channel); if ( !bcomp((U32 *)rGDMA.SRC, (U32 *)rGDMA.DST, (int)rGDMA.CNT) ) { Print("Fail.") ; return 0 ; } else { Print("Ok.") ; return 1 ; } } void GdmaRegTest(void) { int gdma_channel; char ch; unsigned int i; /* Get GDMA Channel */ gdma_channel = GetGdmaChannel(); Print("\rGDMA%d register read&write test.",gdma_channel); do { /* GDMASRC read,write test */ Print("\r$ Enter GDMASRC%d register value?[8 hexdigit]_",gdma_channel); i = gethex2dec(8); get_byte(); //dummy for carrige return if(gdma_channel) { GDMASRC1 = i; Print("\r$GDMASRC1[0x%08x] = 0x%08x\r", &GDMASRC1,GDMASRC1); } else { GDMASRC0 = i; Print("\r$GDMASRC0[0x%08x] = 0x%08x\r", &GDMASRC0,GDMASRC0); } /* GDMADST read,write test */ Print("\r$ Enter GDMADST%d register value?[8 hexdigit]_",gdma_channel); i = gethex2dec(8); get_byte(); //dummy for carrige return if(gdma_channel) { GDMADST1 = i; Print("\r$GDMADST1[0x%08x] = 0x%08x\r", &GDMADST1,GDMADST1); } else { GDMADST0 = i; Print("\r$GDMADST0[0x%08x] = 0x%08x\r", &GDMADST0,GDMADST0); } /* GDMACNT read,write test */ Print("\r$ Enter GDMACNT%d register value?[8 hexdigit]_",gdma_channel); i = gethex2dec(8); get_byte(); //dummy for carrige return if(gdma_channel) { GDMACNT1 = i; Print("\r$GDMACNT1[0x%08x] = 0x%08x\r", &GDMACNT1,GDMACNT1); } else { GDMACNT0 = i; Print("\r$GDMACNT0[0x%08x] = 0x%08x\r", &GDMACNT0,GDMACNT0); } /* GDMACON read,write test */ Print("\r$ Enter GDMACON%d register value?[4 hexdigit]_",gdma_channel); i = gethex2dec(4); get_byte(); //dummy for carrige return if(gdma_channel) { GDMACON1 = i; Print("\r$GDMACON1[0x%08x] = 0x%08x\r", &GDMACON1,GDMACON1); Print("\r$GDMASRC1[0x%08x] = 0x%08x\r", &GDMASRC1,GDMASRC1); Print("\r$GDMADST1[0x%08x] = 0x%08x\r", &GDMADST1,GDMADST1); Print("\r$GDMACNT1[0x%08x] = 0x%08x\r", &GDMACNT1,GDMACNT1); } else { GDMACON0 = i; Print("\r$GDMACON0[0x%08x] = 0x%08x\r", &GDMACON0,GDMACON0); Print("\r$GDMASRC0[0x%08x] = 0x%08x\r", &GDMASRC0,GDMASRC0); Print("\r$GDMADST0[0x%08x] = 0x%08x\r", &GDMADST0,GDMADST0); Print("\r$GDMACNT0[0x%08x] = 0x%08x\r", &GDMACNT0,GDMACNT0); } Print("\r$Continuing GDMA Register R/W test?[Y/N]_"); } while(((ch=get_byte()) != 'N')&& (ch != 'n')); } void GdmaUart0Mem(void) { if(rGDMA.CON&GDMA_MEM2UART) Memory2UartTest(SERIAL_DEV0); else Uart2MemoryTest(SERIAL_DEV0); } void GdmaUart1Mem(void) { if(rGDMA.CON&GDMA_MEM2UART) Memory2UartTest(SERIAL_DEV1); else Uart2MemoryTest(SERIAL_DEV1); } void Uart2MemoryTest(unsigned uart_channel) { int gdma_channel; gdma_channel = GetGdmaChannel(); GdmaIntEnable(gdma_channel); SetupUart4Gdma(uart_channel,gdma_channel); tmReset(TIMER_DEV1); tm_init(TIMER_DEV1,(ONE_SECOND/TICKS_PER_SECOND)); TimerStart(TIMER_DEV1); if(gdma_channel) while(!Gdma1DoneFlag) DisplayGdma(gdma_channel); else while(!Gdma0DoneFlag) DisplayGdma(gdma_channel); Timer1Stop(); //UARTPollInit(uart_channel); Print("\r\r\r"); PrtSysTime(TIMER_DEV1,"GDMA Transfer time"); tmReset(TIMER_DEV1); GdmaIntDisable(gdma_channel); } /* * UART to Memory data transfer through GDMA continually. */ void DataDownLoad(void) { int RxDataSize; char ch; do { RxDataSize = GdmaDownLoad(); MemDump((U32 *)DmaCodeArea,(U32 *)(DmaCodeArea+RxDataSize)); Print("\nTo exit, type ESC key!!!\n"); if(is_space(ch=get_byte())); }while(ch != ESC); } /* * GDMA Down Load */ unsigned GdmaDownLoad(void) { unsigned RcvDataSize; // Interrupt Enable Enable_Int(nGLOBAL_INT); GdmaIntEnable(SERIAL_DEV0); Print("\r\r\r$ Download data UART0 to Memory through GDMA0....\r") ; GdmaReset(0); //Reset Channel of GDMA0 rGDMA.DST=(U32)DmaCodeArea; //default source addrmaTestDst RcvDataSize = GetDataSize(SERIAL_DEV0); //Include CRC value rGDMA.CNT = RcvDataSize+8; //Print("\r$ Receive data size = 0x%08x", rGDMA.CNT); //Print("\r$ DownLoad area = 0x%08x\r\r\r", rGDMA.DST); //Set GDMA Mode for transferring data Uart to memory through GDMA rGDMA.CON = GDMA_INT_ENABLE|GDMA_U0MODE|GDMA_SRC_FIX; GDMARegWrite(0); UARTCONT0 = UCON_RXM_GDMA0REQ ; // Set UART to GDMA request mode //put_byte(UARTRXB0) ; GdmaRunEnable(0); //tm_init_ms(TIMER0); // Timer initialize & start while(!Gdma0DoneFlag) ; //DisplayGdma(0); Print("\r Gdma Done") ; GdmaIntDisable(SERIAL_DEV0); /* if(CRCErrorCheck((char *)DmaCodeArea,RcvDataSize)) Print("\rCRC Check Ok .."); else Print("\rCRC Check Error Occured!!!"); */ return((unsigned)RcvDataSize); } /* * Setup UART for GDMA down load */ void SetupUart4Gdma(unsigned uart_channel,unsigned gdma_channel) { int RcvDataSize ; Print("\r\r\r$ Download User Program use by GDMA...\r\r") ; rGDMA.DST=(U32)DmaCodeArea; //default source addrmaTestDst RcvDataSize = GetDataSize(uart_channel); //Include CRC value rGDMA.CNT = RcvDataSize+4; Print("\r$ Receive data size = 0x%08x", rGDMA.CNT); Print("\r$ GDMA DownLoad area = 0x%08x\r\r\r", rGDMA.DST); /* GDMA MODE SET for UART to MEMORY Transfer test */ if(!rGDMA.DIALOG) { //default set for Uart to memory test Uart2MemRun(uart_channel,gdma_channel); GDMARegWrite(gdma_channel); } else { // GDMA related register all clear to reset state GdmaReset(gdma_channel); GDMARegWrite(gdma_channel); //GDMARegPrint(gdma_channel); } /* Setup UART channel for GDMA Request */ SetGdmaRxReqMode(uart_channel, gdma_channel); GdmaRunEnable(gdma_channel); } /* * Set UART to GDMA channel request mode */ void SetGdmaRxReqMode(unsigned uart_channel, unsigned gdma_channel) { if(uart_channel) { if(gdma_channel) UARTCONT1 = UCON_RXM_GDMA1REQ; else UARTCONT1 = UCON_RXM_GDMA0REQ; } else { if(gdma_channel) UARTCONT0 = UCON_RXM_GDMA1REQ; else UARTCONT0 = UCON_RXM_GDMA0REQ; } } /* * Set UART GDMA channel request mode */ void SetGdmaTxReqMode(unsigned uart_channel, unsigned gdma_channel) { if(uart_channel) { if(gdma_channel) UARTCONT1 = UCON_TXM_GDMA1REQ; else UARTCONT1 = UCON_TXM_GDMA0REQ; } else { if(gdma_channel) UARTCONT0 = UCON_TXM_GDMA1REQ; else UARTCONT0 = UCON_TXM_GDMA0REQ; } } void Memory2UartTest(unsigned uart_channel) { int gdma_channel; gdma_channel = GetGdmaChannel(); GdmaIntEnable(gdma_channel); //if(uart_channel) rGDMA.DST = (U32)&UARTTXH1; //Uart1 receive buffer register //else rGDMA.DST = (U32)&UARTTXH0; //Uart0 receive buffer register Print("\r>>Input source Address[0x1500000]> 0x"); rGDMA.SRC = get_num() ; if (rGDMA.SRC==0) rGDMA.SRC=(U32)DmaTestSrc; //default source addr Print("\r>>Input Memory Test Size[0x10000]> 0x") ; rGDMA.CNT = get_num() ; if (rGDMA.CNT==0) rGDMA.CNT=(U32)DmaTestSize; /*Initialize source memory with random pattern */ GdmaMemInit((void *)rGDMA.SRC, (int)rGDMA.CNT); /* GDMA MODE SET for memory word test*/ if(!rGDMA.DIALOG) {//default set for memory to uart test Mem2UartRun(uart_channel, gdma_channel); GDMARegWrite(gdma_channel); } else { GdmaReset(gdma_channel); GDMARegWrite(gdma_channel); //GDMARegPrint(gdma_channel); } SetGdmaTxReqMode(uart_channel, gdma_channel); GdmaRunEnable(gdma_channel); tmReset(TIMER_DEV1); tm_init(TIMER_DEV1,(ONE_SECOND/TICKS_PER_SECOND)); TimerStart(TIMER_DEV1); if(gdma_channel) while(!Gdma1DoneFlag) DisplayGdma(gdma_channel); else while(!Gdma0DoneFlag) DisplayGdma(gdma_channel); Timer1Stop(); //UARTPollInit(uart_channel); put_byte('\r'); PrtSysTime(TIMER_DEV1,"GDMA Transfer time"); tmReset(TIMER_DEV1); GdmaIntDisable(gdma_channel); } /* * Initialize GDMA Memory with ASCII pattern for test */ void GdmaMemInit(void *src, int tsize) { U8 *InitSrcAddr; int cnt ; int ascii=48; InitSrcAddr = (U8 *)src; cnt = tsize ; while(cnt--) { if(ascii < 123) *InitSrcAddr++ = (U32)ascii; else ascii = 48; ascii++; } } /* * External GDMA Request test */ void ExtGdmaReqTest(void) { int gdma_channel; gdma_channel = GetGdmaChannel(); GdmaIntEnable(gdma_channel); Print("\r>>Input source Address[0x1500000]> 0x"); rGDMA.SRC = get_num() ; if (rGDMA.SRC==0) rGDMA.SRC=(U32)DmaTestSrc; //default source addr Print("\r>>Input destination Address[0x1600000]> 0x"); rGDMA.DST = get_num() ; if (rGDMA.DST==0) rGDMA.DST=(U32)DmaTestDest; //default source addr Print("\r>>Input Memory Test Size[0x10000]> 0x") ; rGDMA.CNT = get_num() ; if (rGDMA.CNT==0) rGDMA.CNT=(U32)DmaTestSize; /*Initialize source memory with random pattern */ MemTestInit((U32 *)rGDMA.SRC, (int)rGDMA.CNT); Print("\rSource Address Initialize done!\r"); /* GDMA MODE SET for memory word test*/ if(!rGDMA.DIALOG) {//default set for memory to uart test ExtDreqRun(gdma_channel); GDMARegWrite(gdma_channel); } else { // Set use by StartUp dialog GdmaReset(gdma_channel); GDMARegWrite(gdma_channel); } tmReset(TIMER_DEV1); tm_init(TIMER_DEV1,(ONE_SECOND/TICKS_PER_SECOND)); TimerStart(TIMER_DEV1); put_byte('\r'); if(gdma_channel) while(!Gdma1DoneFlag) DisplayGdma(gdma_channel); else while(!Gdma0DoneFlag) DisplayGdma(gdma_channel); Timer1Stop(); put_byte('\r'); PrtSysTime(TIMER_DEV1,"GDMA Transfer time"); tmReset(TIMER_DEV1); GdmaIntDisable(gdma_channel); } /******************************************************************/ /* GDMA0, GDMA1 FUNCTION MODULE FOR EACH MODE */ /******************************************************************/ /* * External GDMA Request run */ void ExtDreqRun(unsigned gdma_channel) { // GDMA related register all clear to reset state GdmaReset(gdma_channel); rGDMA.CON |= GDMA_RUN|GDMA_INT_ENABLE|GDMA_EXTDREQ; } /* * GDMA Uart versa Memory */ void Uart2MemRun(unsigned uart_channel,unsigned gdma_channel) { GdmaReset(gdma_channel); // GDMA related register all clear to reset state if(uart_channel) rGDMA.CON = GDMA_INT_ENABLE|GDMA_U1MODE|GDMA_SRC_FIX; else rGDMA.CON = GDMA_INT_ENABLE|GDMA_U0MODE|GDMA_SRC_FIX; } void Mem2UartRun(unsigned uart_channel,unsigned gdma_channel) { GdmaReset(gdma_channel); // GDMA related register all clear to reset state if(uart_channel) rGDMA.CON = GDMA_INT_ENABLE|GDMA_U1MODE|GDMA_MEM2UART|GDMA_DST_FIX; else rGDMA.CON = GDMA_INT_ENABLE|GDMA_U0MODE|GDMA_MEM2UART|GDMA_DST_FIX; //GDMARegPrint(gdma_channel); //GDMARegWrite(gdma_channel); } /* * GDMA memory to memory test submodule */ void GdmaMem2Mem(unsigned gdma_channel) { // GDMA related register all clear to reset state GdmaReset(gdma_channel); rGDMA.CON |= GDMA_RUN|GDMA_INT_ENABLE|GDMA_MEM2MEM; GDMARegWrite(gdma_channel); } void GdmaTxWidth(int width) { switch(width) { case 0:rGDMA.CON=(rGDMA.CON&~GDMA_NO_USE)|GDMA_TX_BYTE; break; case 1:rGDMA.CON=(rGDMA.CON&~GDMA_NO_USE)|GDMA_TX_HALFWORD; break; case 2:rGDMA.CON=(rGDMA.CON&~GDMA_NO_USE)|GDMA_TX_WORD; break; default: rGDMA.CON|=GDMA_NO_USE; } } /* Setup memory to memory gdma transfer */ void SetUpmem2mem(void) { Print("\r>>Input Destination Address[0x1200000]> 0x"); rGDMA.DST = get_num() ; if (rGDMA.DST==0) rGDMA.DST=(U32)DmaTestDest; //default destination addr Print("\r>>Input source Address[0x1100000]> 0x"); rGDMA.SRC = get_num() ; if (rGDMA.SRC==0) rGDMA.SRC=(U32)DmaTestSrc; //default source addr Print("\r>>Input Memory Test Size[0x10000]> 0x") ; rGDMA.CNT = get_num() ; if (rGDMA.CNT==0) rGDMA.CNT=(U32)DmaTestSize; } /* * Initialize GDMA control register */ void GdmaReset(unsigned gdma_channel) { if(gdma_channel) { GDMASRC1 = 0; GDMADST1 = 0; GDMACNT1 = 0; GDMACON1 = 0; } else { GDMASRC0 = 0; GDMADST0 = 0; GDMACNT0 = 0; GDMACON0 = 0; } } /* * GDMA Run enable /disable control */ void GdmaRunEnable(unsigned gdma_channel) { if(gdma_channel) GDMA1_RUN_ENABLE = 1 ; else GDMA0_RUN_ENABLE = 1 ; } /* * GDMA Interrupt enable & disable and clear transfer done flag */ void GdmaIntEnable(unsigned gdma_channel) { if(gdma_channel) { Enable_Int(nGDMA1_INT); Gdma1DoneFlag = 0; } else { Enable_Int(nGDMA0_INT); Gdma0DoneFlag = 0; } Enable_Int(nGLOBAL_INT); } void GdmaIntDisable(unsigned gdma_channel) { if(gdma_channel) { Disable_Int(nGDMA1_INT); Gdma1DoneFlag = 0; } else { Disable_Int(nGDMA0_INT); Gdma0DoneFlag = 0; } } /******************************************************************/ /* GDMA0, GDMA1 Interrupt Service Routines */ /******************************************************************/ void GDMA0isr(void) { //Clear_PendingBit(nGDMA0_INT) ; //UARTPollInit(CONSOLE); // Change UART mode to polling #if DEBUG switch((GDMACON0&GDMA_NO_USE)>>12) { case 0: Print("\rGDMA0:BYTE TRANSFER IS DONE! "); break; case 1: Print("\rGDMA0:HALFWORD TRANSFER IS DONE! "); break; case 2: Print("\rGDMA0:WORD TRANSFER IS DONE! "); break; default: Print("\rGDMA0:NO USE TRANSFER IS MODE! "); break; } switch((GDMACON0&GDMA_MODE)>>2) { case 0: Print("\rTRANSFER MODE IS SOFTWARE."); break; case 1: Print("\rTRANSFER MODE IS EXTDREQ."); break; case 2: Print("\rTRANSFER MODE IS UART0."); break; case 3: Print("\rTRANSFER MODE IS UART1."); } GdmaReset(GDMA0); #endif Gdma0DoneFlag = 1; } void GDMA1isr(void) { //Clear_PendingBit(nGDMA1_INT) ; #if DEBUG switch((GDMACON1&GDMA_NO_USE) >>12) { case 0: Print("\rGDMA1:BYTE TRANSFER IS DONE!"); break; case 1: Print("\rGDMA1:HALFWORD TRANSFER IS DONE!"); break; case 2: Print("\rGDMA1:WORD TRANSFER IS DONE!"); break; default: Print("\rGDMA1:NO USE TRANSFER IS MODE!"); break; } switch((GDMACON1&GDMA_MODE)>>2) { case 0: Print("\rTRANSFER MODE IS SOFTWARE."); break; case 1: Print("\rTRANSFER MODE IS EXTDREQ."); break; case 2: Print("\rTRANSFER MODE IS UART0."); break; case 3: Print("\rTRANSFER MODE IS UART1."); } GdmaReset(GDMA1); #endif Gdma1DoneFlag = 1; } /******************************************************************/ /* GDMA0, GDMA1 Test Utility Functions */ /******************************************************************/ void DisplayGdma(unsigned gdma_channel) { U32 gdmacnt; if(gdma_channel) gdmacnt = GDMACNT1; else gdmacnt = GDMACNT0; IOPDATA = ~(gdmacnt%4); } /* * GDMA Configuration viewer */ void GDMAConfigView(void) { unsigned channel; channel = GetGdmaChannel(); GDMARegRead(channel); Print("\r\r===============================================\r"); Print(">>> GDMA%d CONTROL REGISTER CONTENTS <<<\r",channel); Print("===============================================\r\r"); if(rGDMA.CON&GDMA_RUN) Print("* GDMA%d Run enabled.\r",channel); else Print("* GDMA%d Run disabled.\r",channel); if(rGDMA.CON&GDMA_BUSY) Print("* GDMA%d is IDLE state.\r",channel); else Print("* GDMA%d is ACTIVE state.\r",channel); switch(rGDMA.CON&GDMA_MODE) { case 0x0004: Print("* GDMA%d:External DMA Request mode.\r",channel); break; case 0x0008: Print("* GDMA%d:UART0 Mode.\r",channel); break; case 0x000C: Print("* GDMA%d:UART1 Mode.\r",channel); break; default : Print("* GDMA%d:Memory to Memory mode.\r",channel); break; } if(rGDMA.CON&GDMA_DST_DEC) Print("* GDMA%d: Decrease detination address.\r",channel); else Print("* GDMA%d: Increase detination address.\r",channel); if(rGDMA.CON&GDMA_SRC_DEC) Print("* GDMA%d: Decrease source address.\r",channel); else Print("* GDMA%d: Increase source address.\r",channel); if(rGDMA.CON&GDMA_DST_FIX) Print("* GDMA%d: Do not change destination address.\r",channel); else Print("* GDMA%d: Increase/Decrease destination address.\r",channel); if(rGDMA.CON&GDMA_SRC_FIX) Print("* GDMA%d: Do not change source address.\r",channel); else Print("* GDMA%d: Increase/Decrease source address.\r",channel); if(rGDMA.CON&GDMA_INT_ENABLE) Print("* GDMA%d: Generate stop interrupt when GDMA stop.\r",channel); else Print("* GDMA%d: Do not generate stop interrupt when GDMA stop.\r",channel); if(rGDMA.CON&GDMA_RESET) Print("* GDMA%d: RESET Gdma control register.\r",channel); else Print("* GDMA%d: Normal operation.\r",channel); if(rGDMA.CON&GDMA_MEM2UART) Print("* GDMA%d: UART0/UART1 to Memory.\r",channel); else Print("* GDMA%d: Memory to UART0/UART1.\r",channel); if(rGDMA.CON&GDMA_BLOCK) Print("* GDMA%d: Block Mode.\r",channel); else Print("* GDMA%d: Single Mode.\r",channel); switch(rGDMA.CON&GDMA_TX_WIDTH) { case 0x0000: Print("* GDMA%d:Transfer width is BYTE.\r",channel); break; case 0x1000: Print("* GDMA%d:Transfer width is HALFWORD.\r",channel); break; case 0x2000: Print("* GDMA%d:Transfer width is WORD.\r",channel); break; default : Print("* GDMA%d:No Use.\r",channel); break; } if(rGDMA.CON&GDMA_CONTINUOUS) Print("* GDMA%d: Continuous mode.\r",channel); else Print("* GDMA%d: Normal operation.\r",channel); if(rGDMA.CON&GDMA_DEMAND) Print("* GDMA%d: Demand mode.\r",channel); else Print("* GDMA%d: Normal operation.\r",channel); Print("===============================================\r"); Print(" GDMA REGISTER VIEW \r"); Print("===============================================\r"); Print(">>> GDMACON%d = 0x%08x\r",channel,rGDMA.CON); Print(">>> GDMASRC%d = 0x%08x\r",channel,rGDMA.SRC); Print(">>> GDMADST%d = 0x%08x\r",channel,rGDMA.DST); Print(">>> GDMACNT%d = 0x%08x\r",channel,rGDMA.CNT); Print("===============================================\r\r"); } // DMA Copy using Interrupt void dcopy(uint32 dmadst, uint32 dmasrc,int Size, int Width) { uint32 DMA_CON_SET ; Disable_Int(nGDMA0_INT); /* Disable GDMA 0 interupt */ SysSetInterrupt(nGDMA0_INT, GDMA0isr); /* Vector setup */ Gdma0DoneFlag = 0; /* GDMA transmit done flag */ GDMASRC0 = dmasrc; GDMADST0 = dmadst; GDMACNT0 = Size; DMA_CON_SET = GDMA_MEM2MEM ; switch(Width) { case 0 : DMA_CON_SET |= GDMA_WIDTH_BTYE; break; case 1 : DMA_CON_SET |= GDMA_WIDTH_HWORD; break; case 2 : default: DMA_CON_SET |= GDMA_WIDTH_WORD; break; } Enable_Int(nGDMA0_INT); /* Enable GDMA 0 interrupt */ GDMACON0 = DMA_CON_SET | GDMA_RUN; /* Start run GDMA0 */ // By Interrupt Mode while(!Gdma0DoneFlag) ; } // DMA Copy without Interrupt void dcopy1(U32 dmadst, U32 dmasrc,int Size, int Width) { long DMA_CON_SET ; GDMASRC1 = dmasrc; GDMADST1 = dmadst; GDMACNT1 = Size; DMA_CON_SET = GDMA_MEM2MEM ; switch(Width) { case 0 : DMA_CON_SET |= GDMA_WIDTH_BTYE; break; case 1 : DMA_CON_SET |= GDMA_WIDTH_HWORD; break; case 2 : default: DMA_CON_SET |= GDMA_WIDTH_WORD; break; } Enable_Int(nGDMA1_INT); /* Enable GDMA 1 interrupt */ GDMACON1 = DMA_CON_SET | GDMA_RUN; while(!Gdma1DoneFlag) ; } // DMA auto test int DmaAutoTest(U32 src,U32 dst,int tsize,int lsize) { int i ; // For use non-cacheable area src |= 0x4000000 ; src |= 0x4000000 ; // Word Test MemTestInit((U32 *)src, tsize); Print("\n ++ DMA Channel 0 Test (Long) .... "); for (i=0 ; i < lsize ; i++) { dcopy(src, dst, tsize,TxWORD) ; if ( !wcomp((U32 *)src, (U32 *)dst, tsize) ) { Print(" Fail !!") ; return MemTestFail ; } PrintMemTestStatus(i%4) ; } Print("Ok") ; // Half Word Test Print("\r ++ DMA Channel 0 Test (Short) ... ") ; for (i=0 ; i < lsize ; i++) { dcopy(src, dst, tsize,TxHWORD) ; if ( !scomp((U16 *)src, (U16 *)dst, tsize) ) { Print(" Fail !!") ; return MemTestFail ; } PrintMemTestStatus(i%4) ; } Print("Ok") ; // Byte Test Print("\r ++ DMA Channel 0 Test (Byte) .... ") ; for (i=0 ; i < lsize ; i++) { dcopy(src, dst, tsize,TxBYTE) ; if ( !bcomp((U8 *)src, (U8 *)dst, tsize) ) { Print(" Fail !!") ; return MemTestFail ; } PrintMemTestStatus(i%4) ; } Print("Ok") ; // Word Test Print("\n ++ DMA Channel 1 Test (Long) .... "); for (i=0 ; i < lsize ; i++) { dcopy1(src, dst, tsize,TxWORD) ; if ( !wcomp((U32 *)src, (U32 *)dst, tsize) ) { Print(" Fail !!") ; return MemTestFail ; } PrintMemTestStatus(i%4) ; } Print("Ok") ; // Half Word Test Print("\r ++ DMA Channel 1 Test (Short) ... ") ; for (i=0 ; i < lsize ; i++) { dcopy1(src, dst, tsize,TxHWORD) ; if ( !scomp((U16 *)src, (U16 *)dst, tsize) ) { Print(" Fail !!") ; return MemTestFail ; } PrintMemTestStatus(i%4) ; } Print("Ok") ; // Byte Test Print("\r ++ DMA Channel 1 Test (Byte) .... ") ; for (i=0 ; i < lsize ; i++) { dcopy1(src, dst, tsize,TxBYTE) ; if ( !bcomp((U8 *)src, (U8 *)dst, tsize) ) { Print(" Fail !!") ; return MemTestFail ; } PrintMemTestStatus(i%4) ; } Print("Ok") ; return MemTestOk ; }