www.pudn.com > H265+_C64X_2008.8.rar > evmdm642osd.h


/* 
 *  Copyright 2003 by Texas Instruments Incorporated. 
 *  All rights reserved. Property of Texas Instruments Incorporated. 
 *  Restricted rights to use, duplicate or disclose this code are 
 *  granted through contract. 
 *   
 */ 
#ifndef _EVMDM642OSD_H 
#define _EVMDM642OSD_H 
 
#ifdef __cplusplus 
extern "C" { 
#endif 
 
 
/* OSD color look-up table size, this is set by hardware and can not be changed */ 
#define EVMDM642OSD_CLUT_SIZE			128 
 
/* OSD modes */ 
#define EVMDM642OSD_MODE_YCBCR_16BIT      0 
#define EVMDM642OSD_MODE_YCBCR_8BIT       1 
 
/* structure to encapsulate the color look-up table */ 
typedef struct EVMDM642OSD_CLUT { 
    Uint32  table[EVMDM642OSD_CLUT_SIZE]; 
} EVMDM642OSD_CLUT; 
 
/* definition of the OSD parameter structure */ 
typedef struct EVMDM642OSD_Params { 
    EVMDM642OSD_CLUT *cLUT;   /* color look-up table */ 
    Int mode;                 /* osd mode            */ 
    Uint16 xStart;            /* horizontal offset of the OSD window in */ 
                              /* relative to start of active video      */ 
    Uint16 yStart;            /* vertical offset of the OSD window in   */ 
                              /* relative to start of active video      */ 
    Uint16 hSize;             /* horizontal size of osd window          */ 
    Uint16 vSize;             /* vertical size of osd window PER FIELD  */ 
                               
    Bool interlaced;          /* to specify whether video is interlaced */ 
    Int thrld;                /* threshold for generating EDMA events   */ 
    Int edmaPri;              /* EDMA priority                          */ 
    Int segId;                /* memory segment ID                      */ 
    Int alignment;            /* memory alignment                       */ 
    Int irqId;                /* EDMA irq id                            */ 
} EVMDM642OSD_Params; 
 
/* osdPackets contains a OSD IO request that specifies location and size  */ 
/* information of a source pixel map. It also contains information on     */ 
/* where to the OSD buffer this pixel map is copied to and how long it    */ 
/* remains visible. If the numActiveFrms is other than 0, the data will   */ 
/* be on screen for the number of frames specified, if it is 0, the data  */ 
/* will be on screen until a new data buffer is provided to the driver    */ 
#define EVMDM642OSD_DISPLAY_FOREVER     0 
 
typedef struct EVMDM642OSD_Packet { 
    QUE_Elem link;           /* link for queuing */ 
    Int osdHOffset;          /* horizontal offset of the pixel map location */ 
                             /* relative to start of OSD window             */ 
    Int osdVOffset;          /* vertical offset of the pixel map location   */  
    			             /* relative to start of OSD window             */ 
    Int osdHSize;            /* horizontal size of the pixel map            */ 
    Int osdVSize;            /* vertical size of the pixel map              */  
    Int numActiveFrms;       /* number of frames pixel map remains visible  */ 
    Uint8 *buf;              /* pointer to pixel map buffer                 */ 
    Bool clearFrame;         /* indicate whether to clear OSD window before */ 
                             /* showing the pixel map                       */ 
     
}EVMDM642OSD_Packet; 
 
/* OSD control commands */ 
#define EVMDM642OSD_CMD_RESET     0x00000001  /* reset osd module of the FPGA */ 
#define EVMDM642OSD_CMD_SET_CLUT  0x00000002  /* load color look-up table     */ 
#define EVMDM642OSD_CMD_CONFIG    0x00000003  /* configure OSD                */ 
#define EVMDM642OSD_CMD_START     0x00000004  /* start OSD operation          */ 
#define EVMDM642OSD_CMD_STOP      0x00000005  /* stop OSD operation           */ 
 
/* OSD IOM function table */ 
extern IOM_Fxns EVMDM642OSD_Fxns; 
 
 
#ifdef __cplusplus 
} 
#endif 
 
#endif  /* _EVMDM642OSD_H */