www.pudn.com > hdl.rar > flashWrite.v

module flashWrite( 
    clk24M, 
    arst, 
    rb, 
    AFULL,//£¿ 
    we, 
    re, 
    cle, 
    ale, 
    ce, 
    wp, 
    //rst, 
    fifodata, 
    data, 
    fiforen 
    ); 
 
    input 
        clk24M, 
        arst, 
        rb, 
        AFULL; 
    output 
        //rst, 
        re, 
        we, 
        cle, 
        ale, 
        ce, 
        wp; 
    input [15:0] 
        fifodata; 
    output [7:0] 
        data; 
    output 
        fiforen; 
    wire 
        //clk100M, 
        //clk32M, 
        //clk2M, 
        //LOCK, 
        cmdstart, 
        cmdfinish, 
        datafinish, 
        datastart, 
        cmdwe, 
        cmdcle, 
        cmdale, 
        sel, 
        //fiforen, 
        datawe, 
        datacle; 
    wire [7:0] 
        cmdata, 
        flashdata; 
    wire [15:0] 
        addr; 
 
    assign re = 1'b1; 
    assign ce = 1'b0; 
    assign wp = 1'b1; 
 
    //rc r(clk100M); 
    //PLL0 pll0(1'b1,clk100M,LOCK,clk2M,clk32M,1'b1); 
    //genarst ga(clk2M,LOCK,rst); 
 
    //FIFO0 ff0(DATA,Q,WE,RE,WCLOCK,RCLOCK,FULL,EMPTY,RESET,AEMPTY,AFULL); 
 
    flashWrCon fwc(clk24M,arst,rb,AFULL,cmdstart,cmdfinish,datastart,addr,datafinish); 
    writeCmd wc(clk24M,arst,addr,cmdstart,cmdfinish,cmdwe,cmdcle,cmdale,sel,cmdata); 
    writeData wd(clk24M,arst,datastart,fifodata,fiforen,datawe,datacle,flashdata,datafinish); 
    condata cd(clk24M,arst,cmdwe,cmdale,cmdcle,cmdata,sel,datawe,datacle,flashdata,we,ale,cle,data); 
    	 
endmodule