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C51 COMPILER V7.06 HST 02/01/2007 01:30:52 PAGE 1
C51 COMPILER V7.06, COMPILATION OF MODULE HST
OBJECT MODULE PLACED IN .\obj\hst.obj
COMPILER INVOKED BY: C:\tools\Keil\C51\BIN\C51.EXE USER\hst.c LARGE OPTIMIZE(9,SIZE) REGFILE(.\obj\sunplus.ORC) BROWSE N
-OAREGS DEBUG OBJECTEXTEND PRINT(.\hst.lst) OBJECT(.\obj\hst.obj)
stmt level source
1 #include "..\userdefine.h"
2 #include "user.h"
3 #include "userinit.h"
4 #include "interrupt.h"
5 #include "..\LCM\lcd501.h"
6 #include "main.h"
7 #include
8 #include
9 #include
10 //=======================
11
12 extern void SPLC501_Erase_OnePage(U8 Page);
13 extern void SPLC501_Write_CharABC(U8 Page,U8 Column,U8 ReverseDispOnOff,U8 CharABC);//lyh add
14
15
16
17
18
19 ///////////////////////////////////////lcd.h
20
21
22 //////////////////////////////////////lcd.c
23 /*
24 void Ini_OLED(void)
25 {
26 unsigned char i;
27 unsigned char code InitCommand[]={
28 0xd5,0x00,//Set Display Clock Divide Ratio/Oscillator Frequency
29 0xd3,0x00,//Set Display Offset
30 0xa8,0x3f,//Set Multiplex Ratio
31 0xad,0x8a,//Set DC-DC on/off, OFF
32 0xd8,0x05,//Set area colour mode on/off & low power display mode
33 0x40, //Set Display Start Line, =0
34 0xa0, //Set Segment Re-map,mapped to SEG0
35 0xc8, //Set COM Output ScanDirection,Scan from COM [N-1] to COM0 Where N
36 0xda,0x12,//Set COM pins hardware configuration
37 0x81,0xa0,//Set Contrast Control
38 0xa4, //Set Entire Display ON/OFF,normal display
39 0xa6, //Set Normal/Inverse Display,normal display
40 0xaf, //DISPLAY ON
41 };
42
43 Clear_SSD1815_RST_Pin;
44 delay(10);
45 Set_SSD1815_RST_Pin;
46 delay(10);
47 for(i=0;i<20;i++)
48 {
49 PMU80_COMWR(InitCommand[i]);
50 }
51 }
52 void SPLC501_Init()
53 {
54 U8 i;
C51 COMPILER V7.06 HST 02/01/2007 01:30:52 PAGE 2
55 // U8 code InitCommand[]={0xe2,0xa2,0xa1,0xc8,0xac,0xa6,0xa4,
56 // 0x26,0x81,0x10,0xd5,0x00,0xd2,0x00,0x2f,0x40,0xb0,0x11,0x04,0xaf};//NOVATEK
57 U8 code InitCommand[]={0xd5,0x00,0xd3,0x30,0xa8,0x3f,
58 0xad,0x8a,0xd8,0x05,0x40,0xa0,0xc8,0xda,0x12,0x81,0x80,0xad,0x8b,0xa4,0xa6,0xaf};//SPLC502
59
60 Clear_SSD1815_RST_Pin;
61 USER_DelayDTms(10);
62 Set_SSD1815_RST_Pin;
63 USER_DelayDTms(10);
64 for(i=0;i<22;i++)
65 {
66 write_SPLC501CI(InitCommand[i]);
67 }
68
69 LCD501_Clear_ALL();
70 }
71 */
72 /*
73 void LCD501_Clear_ALL2()
74 {
75 U8 i;
76 for(i=6;i<8;i++)
77 {
78 SPLC501_Erase_OnePage(i);
79 }
80 SPLC501_Write_CharABC(0x6,0,0,'H');
81 }
82 */
83 char test_nandmem(){
84 1 char mmm[]="12345";
85 1 USER_EraseReserveBlock(0);
86 1 USER_WriteReserveBlock(0);
87 1 USER_ReadReserveBlock(0);
88 1 if(memcmp(gc_PlayRecordDataBuf,mmm,5)==0)return 1;
89 1 return 0;
90 1 }
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 65 ----
CONSTANT SIZE = 6 ----
XDATA SIZE = ---- 6
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)