www.pudn.com > dv981-hd.rar > ADSP.H, change:2007-04-12,size:7715b
/**********************************************************************/
/*************** MTK CONFIDENTIAL & COPYRIGHTED ****************/
/*************** ****************/
/*************** $Modtime:: 03/10/27 10:19a $ ****************/
/*************** $Revision: 5.0 $ ****************/
/*************** ****************/
/*************** Description : ****************/
/*************** ****************/
/*************** ****************/
/*************** Company : MediaTek Inc. ****************/
/*************** Programmer : ****************/
/**********************************************************************/
#ifndef _ADSP_H
#define _ADSP_H
#define CH_EQ_BAND_NO 10
#define MAX_VOL_LEVEL 20
#define MIN_VOL_LEVEL 0
#define MAX_KEY_LEVEL 16
#define ZERO_KEY_LEVEL 0
#define MIN_KEY_LEVEL -16
#define GAIN_DRY_MAX 29
#define GAIN_BAND_MAX 29
#ifdef INTERNAL_KARA
#define GAIN_MIC_MAX 17
#else
#define GAIN_MIC_MAX 21
#endif
#ifdef KARAOKE_SIMPLE_ECHO
#ifdef INTERNAL_KARA
#define ECHO_LEVEL_MAX 17
#else
#define ECHO_LEVEL_MAX 21
#endif
#else /* orignal echo */
#define DELAY_ECHO_MAX 21
#define ECHO_LEVEL_MAX 21
#endif /* orignal echo */
#define TRIM_LEVEL_MAX 41
#define VSURR_GAIN_MAX 16
#define DNR_MAX 9
#define LRMIX_MAX 17
#define LRMIX_LEFT_ONLY 0
#define LRMIX_RIGHT_ONLY (LRMIX_MAX - 1)
#define LRMIX_BOTH ((BYTE)((LRMIX_MAX - 1)/2))
#define MIC_TH_MAX 15
#define DELAY_SUB_MAX 7
#ifdef CHANNEL_AUDIO_DELAY
#define AUD_DELAY_LEVEL_MAX (5)//(6)
#define AUD_DELAY_LEVEL_MIN (-5)//(-6)
#endif
// *********************************************************************
// For ADSP control
// *********************************************************************
typedef struct {
union
{
BYTE Byte;
struct
{
BYTE LRMix:1;
BYTE VoiceCancel:1;
BYTE VocalAssist:1;
BYTE Reserve:5;
} Bit;
} Union;
} strucDspKaraFlag;
#define DSP_AC3_KARA_DISABLE ((WORD)0x0001)
#define DSP_AC3_KARA_AWARE ((WORD)0x0002)
#define DSP_AC3_KARA_NONE ((WORD)0x0004)
#define DSP_AC3_KARA_V1 ((WORD)0x0008)
#define DSP_AC3_KARA_V2 ((WORD)0x0010)
#define DSP_AC3_KARA_BOTH ((WORD)0x0020)
#define DSP_AC3_NO_MELODY ((WORD)0x0080)
typedef struct {
union
{
BYTE Byte;
struct
{
BYTE On:1;
BYTE Reset:1;
BYTE Eq:1;
BYTE Robust:1;
BYTE Reserve:4;
} Bit;
} Union;
} strucDspMicFlag;
typedef struct {
union
{
DWRD Dwrd;
struct
{
/* BYTE 3 */
BYTE Reserve4:8;
/* BYTE 2 */
BYTE RsSize:1;
BYTE CbSize:1;
BYTE Ch7Size:1;
BYTE Reserve3:5;
/* BYTE 1 */
BYTE Reserve2:4;
BYTE CSize:1;
BYTE LSize:1;
BYTE RSize:1;
BYTE LsSize:1;
/* BYTE 0 */
BYTE Type:3;
BYTE CbOn:1;
BYTE Ch7On:1;
BYTE SubOn:1;
BYTE Reserve1:2;
} Bit;
} Union;
} strucDspSpkConfig;
#define ADSP_SPK_SMALL 0
#define ADSP_SPK_LARGE 1
#define EQ_CH_C 0
#define EQ_CH_L 1
#define EQ_CH_R 2
#define EQ_CH_LS 3
#define EQ_CH_RS 4
#define EQ_CH_CB 5
#define EQ_CH_CH7 6
#define EQ_CH_ALL 7
#define EQ_CH_MAX 8
#define EQ_BAND_DRY 0
#define EQ_BAND_MAX (CH_EQ_BAND_NO + 1)
typedef struct {
union
{
BYTE Byte;
struct
{
BYTE ChEqOn:1;
BYTE BassBoostOn:1;
BYTE BassPipeOn:1;
BYTE TrebleBoostOn:1;
BYTE Reserve:4;
} Bit;
} Union;
} strucDspEqFlag;
#define DELAY_CH_C 0
#define DELAY_CH_L 1
#define DELAY_CH_R 2
#define DELAY_CH_LS 3
#define DELAY_CH_RS 4
#define DELAY_CH_CB 5
#define DELAY_CH_CH7 6
#define DELAY_CH_SUB 7
#define DELAY_CH_MAX 8
#define MAX_CH_DELAY_LEN 60 /* 6m/10cm */
#define MAX_BASS_DELAY_NUM 7
#define TRIM_CH_C 0
#define TRIM_CH_L 1
#define TRIM_CH_R 2
#define TRIM_CH_LS 3
#define TRIM_CH_RS 4
#define TRIM_CH_CB 5
#define TRIM_CH_CH7 6
#define TRIM_CH_SUB 7
#define TRIM_LFE 8
#define TRIM_CH_MAX 9
#define MIC_EQ_DRY 0
#define MIC_EQ_BASS 1
#define MIC_EQ_MID 2
#define MIC_EQ_TRE 3
#define MIC_EQ_MAX 4
#define VS_CTRL_GAIN 0
#define VS_CTRL_W_GAIN 1
#define VS_CTRL_DELAY 2
#define VS_CTRL_MAX
typedef struct {
union
{
WORD Word;
struct
{
/* BYTE 2 */
BYTE Reserve2:8;
/* BYTE 1 */
BYTE On:1;
BYTE Auto:1;
BYTE Balance:1;
BYTE Surround:1;
BYTE Reserve1:4;
} Bit;
} Union;
} strucPrologicFlag;
#define MIC_MIX_LR 0x01
#define MIC_MIX_LS_RS 0x02
#define MIC_MIX_C 0x04
#define MIC_MIX_CH78 0x08
#define MIC_MIX_CH9A 0x40
/* for B_IECFLAG */
#define SPDIF_FLAG_PCM 0
#define SPDIF_FLAG_RAW 1
#define SPDIF_FLAG_MANUAL_PCM 2
#define SPDIF_FLAG_MANUAL_MUTE 3
/* for SPDIF control */
#define SPDIF_MANUAL_PCM 0
#define SPDIF_MANUAL_RAW 1
#define SPDIF_MANUAL_MUTE 2
/* for SPDIF PCM output channel */
#define SPDIF_IEC_LR 0
#define SPDIF_IEC_LS_RS 1
#define SPDIF_IEC_C_LFE 2
#define SPDIF_IEC_CH78 3
#define SPDIF_IEC_SPDIF_IN 4
#define SPDIF_IEC_CH910 5
typedef struct {
union
{
BYTE Byte;
struct
{
BYTE MicLR:1;
BYTE MicLsRs:1;
BYTE MicC:1;
BYTE MicCh78:1;
BYTE Reserve:4;
} Bit;
} Union;
} strucMicMix;
#define SPK_CFG_LT_RT 0 /* pro-logic compatible */
#define SPK_CFG_MONO 1
#define SPK_CFG_LR 2 /* LO/RO */
#define SPK_CFG_30 3
#define SPK_CFG_21 4
#define SPK_CFG_31 5
#define SPK_CFG_22 6
#define SPK_CFG_32 7
/* for HDCD decoder config */
#define ADSP_HDCD_ENABLE 0x0001
#define ADSP_HDCD_AUTO_LEVEL 0x0002
#define ADSP_HDCD_DITHER 0x0004
#define ADSP_HDCD_FILTER 0x0008
#define ADSP_HDCD_NO_POST 0x0100
/* for B_IEC_OPTION */
#define ADSP_IEC_DTS_PCM 0x00
#define ADSP_IEC_DTS_RAW 0x01
//for IEC max frequency
#define ADSP_IEC_PCM_48K 1
#define ADSP_IEC_PCM_96K 2
#define ADSP_IEC_PCM_192K 3
// for W_PLIICONFIG
typedef struct {
union
{
WORD Word;
struct
{
/* BYTE 1 */
BYTE bCenterWidth:4;
BYTE bDimension:4;
/* BYTE 0 */
BYTE En:1;
BYTE AutoMode:1;
BYTE AutoDefault:1;
BYTE AutoFlag:1;
BYTE AutoBal:1;
BYTE Polarity:1;
BYTE Panorama:1;
BYTE SurrFilter:1;
} Bit;
} Union;
} strucDspPLIIConfig;
// for W_PLIIMODE
typedef struct {
union
{
WORD Word;
struct
{
/* BYTE 1 */
BYTE Reserve2;
/* BYTE 0 */
BYTE bMode:3;
BYTE Reserve1:5;
} Bit;
} Union;
} strucDspPLIIMode;
#define DSP_PL2_EMU 0
#define DSP_PL2_VIATURL 1
#define DSP_PL2_MUSIC 2
#define DSP_PL2_MOVIE 3
#define DSP_PL2_MATRIX 4
#define DSP_PL2_CUSTOM 7
// for B_VSURRFLAG
#define DSP_VSURR_OFF 0x00
#define DSP_VSURR_MTK 0x01
#define DSP_VSURR_N22 0x02
#endif /* _ADSP_H */