www.pudn.com > DMBDRV.rar > SpiHw.h

#ifndef __SPIHW_H__ 
#define __SPIHW_H__ 
 
#include "SianoSpi.h" 
 
#define MIN_BUFF_PARTITION 256 
#define FW_STEP 4 
 
/////////////////////////////////////////////////////////////////////////////// 
//Compilation Flags 
//#define TRAILINGBYPIO //trailing bytes collected by programmed IO bad option 
#define GET_GPIOXX_2_IRQ 
#define FIRMWERE_DOWNLOAD 
//#define SPI_ENABLE_DMA  //If we Are using SPI_ENABLE_DMA we must also use GET_GPIOXX_2_IRQ!!!!! 
#define CONFIGURE_GPIO 
#define USE_CONSO_DEFAULT 
//#define DMA_LOOPBACK_TEST 
 
 
///////////////////////////////////////////////// 
//for loading ndis miniport over the spi driver (dvb-h mode) 
#define _LOAD_NDISMINIPORT  
 
///////////////////////////////////////////////////////// 
//TODO: Change to support both tdmb and dvb-h 
//#define SPIDATAPACKET 0x025F// for tdmb packet 
#define SPIDATAPACKET 0x02BB// for DVB-H packets 
///////////////////////////////////////////////////////// 
 
///////////////////////////////////////////////// 
 
//////////////////////////////////////////////////////////////////////////////// 
//SSP Compilation flags --relevant for SpiDma.cpp and Spihw.cpp 
//-------------------------------------------------------------// 
#define USE_SSP1_PORT 
//#define USE_SSP2_PORT 
//#define USE_SSP3_PORT 
 
 
 
#define SPIPACKETSIZE 256 
 
#define MICROINSEC 1000000 
 
//swapping the DWORD  
#define SWAP32(x)	( (((x)&0x000000ff) << 24) | \ 
					 (((x)&0x0000ff00) << 8) |	\ 
					 (((x)&0x00ff0000) >> 8) |	\ 
					 (((x)&0xff000000) >> 24)) 
 
 
 
#define SSSR_TFL_MASK 0xF<<8 
#define SSSR_RFL_MASK 0xF<<12 
 
//FOR SSP2 GPIO CONFIGURATION 
//GADR (pin direction) CONFIGURATION 
#define XLLP_GPIO_BIT_SSP2CLK_GADR1			(0x1<<4)      
#define XLLP_GPIO_BIT_SSP2FRM_GADR1			(0x1<<5)      
#define XLLP_GPIO_BIT_SSP2TXD_GADR1			(0x1<<6) 
#define XLLP_GPIO_BIT_SSP2RXD_GADR1			(0x1<<8) 
//GAFR (alternate function) CONFIGURATION 
#define XLLP_GPIO_AF2_SSP2CLK_GAFR1_L		(0x2<<8)//alt func 2 
#define XLLP_GPIO_AF2_SSP2CLK_MASK_GAFR1_L	(0x3<<8) 
 
#define XLLP_GPIO_AF2_SSP2FRM_GAFR1_L		(0x2<<10)//alt func 2 
#define XLLP_GPIO_AF2_SSP2FRM_MASK_GAFR1_L	(0x3<<10) 
 
#define XLLP_GPIO_AF2_SSP2TXD_GAFR1_L		(0x2<<12)//alt func 2 
#define XLLP_GPIO_AF2_SSP2TXD_MASK_GAFR1_L	(0x3<<12) 
 
#define XLLP_GPIO_AF1_SSP2RXD_GAFR1_L		(0x1<<16)//alt func 1 
#define XLLP_GPIO_AF1_SSP2RXD_MASK_GAFR1_L	(0x3<<16) 
 
BOOL	ConfigureSpiHw(PSPIDEVICEEXTENSION pSpiDevExt); 
void	UnConfigureSpiHw(PSPIDEVICEEXTENSION pSpiDevExt); 
VOID  WriteFW(PSPIDEVICEEXTENSION pSpiDevExt,BYTE* pFW,DWORD Len); 
 
 
VOID	SpiDrvThread(PVOID pArg); 
VOID	SpiRxCriticalIST(PVOID pArg); 
 
#endif