www.pudn.com > DMBDRV.rar > PxaDMA.cod
; Listing generated by Microsoft (R) Optimizing Compiler Version 13.10.4345
TTL E:\WM604\PLATFORM\SEUICBSP\SRC\DRIVERS\DMBDRV\DmaPxaXXX\.\PxaDMA.c
CODE32
00000 AREA |.drectve|, DRECTVE
DCB "-defaultlib:coredll.lib "
DCB "-defaultlib:corelibc.lib "
00000 AREA |.rdata|, DATA, READONLY
|userBusWidthToDmaConfig| DCD 0x1
DCD 0x2
DCD 0x3
|userBurstSizeToDmaConfig| DCD 0x1
DCD 0x2
DCD 0x3
EXPORT |ResetEvent|
IMPORT |EventModify|
; File e:\wm604\public\common\sdk\inc\kfuncs.h
00000 AREA |.text| { |ResetEvent| }, CODE, ARM, SELECTION=2 ; comdat any
00000 AREA |.pdata$$ResetEvent|, PDATA, SELECTION=5, ASSOC=|.text| { |ResetEvent| } ; comdat associative
|$T39004| DCD |$L39003|
DCD 0x40000501
; Function compile flags: /Ogsy
00000 AREA |.text| { |ResetEvent| }, CODE, ARM, SELECTION=2 ; comdat any
00000 |ResetEvent| PROC
; 174 : _inline BOOL ResetEvent(HANDLE h) {
00000 |$L39003|
00000 e52de004 str lr, [sp, #-4]!
00004 |$M39001|
; 175 : return EventModify(h,EVENT_RESET);
00004 e3a01002 mov r1, #2
00008 eb000000 bl EventModify
; 176 : }
0000c e49de004 ldr lr, [sp], #4
00010 e12fff1e bx lr
00014 |$M39002|
ENDP ; |ResetEvent|
EXPORT |??_C@_1GM@BBJNGGCL@?$AAP?$AAh?$AAy?$AAD?$AAm?$AAa?$AAS?$AAe?$AAt?$AAU?$AAp?$AA?0?$AA?5?$AAV?$AAi?$AAr?$AAt?$AAu?$AAa?$AAl@| [ DATA ] ; `string'
EXPORT |??_C@_0O@DJLCAKBK@dma?5registers?$AA@| [ DATA ] ; `string'
EXPORT |PhyDmaSetUp|
IMPORT |VirtualAllocCopy|
IMPORT |NKDbgPrintfW|
IMPORT |XllpDmacAllocChannel|
IMPORT |HalAllocateCommonBuffer|
IMPORT |XllpDmacInit|
; File e:\wm604\platform\seuicbsp\src\drivers\dmbdrv\dmapxaxxx\pxadma.c
00000 AREA |.text| { |PhyDmaSetUp| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 AREA |.pdata$$PhyDmaSetUp|, PDATA, SELECTION=5, ASSOC=|.text| { |PhyDmaSetUp| } ; comdat associative
|$T39015| DCD |$L39014|
DCD 0x40002402
00000 AREA |.rdata| { |??_C@_0O@DJLCAKBK@dma?5registers?$AA@| }, DATA, READONLY, SELECTION=2 ; comdat any
|??_C@_0O@DJLCAKBK@dma?5registers?$AA@| DCB "dma registers", 0x0 ; `string'
00000 AREA |.rdata| { |??_C@_1GM@BBJNGGCL@?$AAP?$AAh?$AAy?$AAD?$AAm?$AAa?$AAS?$AAe?$AAt?$AAU?$AAp?$AA?0?$AA?5?$AAV?$AAi?$AAr?$AAt?$AAu?$AAa?$AAl@| }, DATA, READONLY, SELECTION=2 ; comdat any
|??_C@_1GM@BBJNGGCL@?$AAP?$AAh?$AAy?$AAD?$AAm?$AAa?$AAS?$AAe?$AAt?$AAU?$AAp?$AA?0?$AA?5?$AAV?$AAi?$AAr?$AAt?$AAu?$AAa?$AAl@| DCB "P"
DCB 0x0, "h", 0x0, "y", 0x0, "D", 0x0, "m", 0x0, "a", 0x0, "S"
DCB 0x0, "e", 0x0, "t", 0x0, "U", 0x0, "p", 0x0, ",", 0x0, " "
DCB 0x0, "V", 0x0, "i", 0x0, "r", 0x0, "t", 0x0, "u", 0x0, "a"
DCB 0x0, "l", 0x0, "A", 0x0, "l", 0x0, "l", 0x0, "o", 0x0, "c"
DCB 0x0, "C", 0x0, "o", 0x0, "p", 0x0, "y", 0x0, "(", 0x0, ")"
DCB 0x0, ":", 0x0, " ", 0x0, "G", 0x0, "d", 0x0, "e", 0x0, "D"
DCB 0x0, "m", 0x0, "a", 0x0, "c", 0x0, "I", 0x0, "n", 0x0, "i"
DCB 0x0, "t", 0x0, " ", 0x0, "F", 0x0, "a", 0x0, "i", 0x0, "l"
DCB 0x0, "e", 0x0, "d", 0x0, 0xd, 0x0, 0xa, 0x0, 0x0, 0x0 ; `string'
; Function compile flags: /Ogsy
00000 AREA |.text| { |PhyDmaSetUp| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 |PhyDmaSetUp| PROC
; 36 : {
00000 |$L39014|
00000 e92d40f0 stmdb sp!, {r4 - r7, lr}
00004 e24dd00c sub sp, sp, #0xC
00008 |$M39012|
00008 e1a05000 mov r5, r0
; 37 : void* ptr;
; 38 : PHYSICAL_ADDRESS phyAddr;
; 39 : //volatile P_XLLP_DMAC_T pDmacHandle = NULL;
; 40 : DMA_ADAPTER_OBJECT adapter;
; 41 :
; 42 : if(XllpDmacInit()==0)
0000c eb000000 bl XllpDmacInit
00010 e3500000 cmp r0, #0
; 43 : {
; 44 : RETAILMSG(1, (TEXT("PhyDmaSetUp, VirtualAllocCopy(): GdeDmacInit Failed\r\n")));
00014 059f0070 ldreq r0, [pc, #0x70]
00018 0b000000 bleq NKDbgPrintfW
; 45 : }
; 46 : XllpDmacAllocChannel((XLLP_DMAC_CHANNEL_T*)&dev->channel,XLLP_DMAC_CHANNEL_PRIORITY_HIGH);
0001c e3a01000 mov r1, #0
00020 e2850004 add r0, r5, #4
00024 eb000000 bl XllpDmacAllocChannel
; 47 :
; 48 :
; 49 : phyAddr.LowPart = DMAC_BASE_PHYSICAL;
; 50 : phyAddr.HighPart = 0;
; 51 : // ptr = MmMapIoSpace(phyAddr, sizeof(DMAC_REGISTERS), FALSE);
; 52 : // RETAILMSG(1, (TEXT("PhyDmaSetUp, MmMapIoSpace ptr: 0x%x\r\n"),ptr));
; 53 : ptr= (DMAC_REGISTERS *)VirtualAllocCopy(sizeof(DMAC_REGISTERS),"dma registers",(PVOID)(DMAC_BASE_U_VIRTUAL));
00028 e59f1058 ldr r1, [pc, #0x58]
0002c e3a02329 mov r2, #0x29, 6
00030 e3a00c11 mov r0, #0x11, 24
00034 e3822605 orr r2, r2, #5, 12
00038 e380002c orr r0, r0, #0x2C
0003c eb000000 bl VirtualAllocCopy
00040 e1a04000 mov r4, r0
; 54 :
; 55 : adapter.ObjectSize = sizeof(DMA_ADAPTER_OBJECT);
00044 e3a0e00c mov lr, #0xC
; 56 : adapter.InterfaceType = Internal;
00048 e3a06000 mov r6, #0
; 57 : adapter.BusNumber = 0;
0004c e3a07000 mov r7, #0
; 58 :
; 59 : dev->desc = HalAllocateCommonBuffer( &adapter,
; 60 : sizeof(DMAC_FRAME_DESCRIPTOR_ST),
; 61 : &dev->descPhyAddr,
; 62 : FALSE);
00050 e28d0000 add r0, sp, #0
00054 e3a03000 mov r3, #0
00058 e2852030 add r2, r5, #0x30
0005c e3a01010 mov r1, #0x10
00060 e1cde0b0 strh lr, [sp]
00064 e58d6004 str r6, [sp, #4]
00068 e58d7008 str r7, [sp, #8]
0006c eb000000 bl HalAllocateCommonBuffer
00070 e5850038 str r0, [r5, #0x38]
; 63 : dev->pDmacAddr = ptr;
; 64 : return TRUE;
00074 e3a00001 mov r0, #1
00078 e5854000 str r4, [r5]
; 65 : }
0007c e28dd00c add sp, sp, #0xC
00080 e8bd40f0 ldmia sp!, {r4 - r7, lr}
00084 e12fff1e bx lr
00088 |$L39017|
00088 00000000 DCD |??_C@_0O@DJLCAKBK@dma?5registers?$AA@|
0008c 00000000 DCD |??_C@_1GM@BBJNGGCL@?$AAP?$AAh?$AAy?$AAD?$AAm?$AAa?$AAS?$AAe?$AAt?$AAU?$AAp?$AA?0?$AA?5?$AAV?$AAi?$AAr?$AAt?$AAu?$AAa?$AAl@|
00090 |$M39013|
ENDP ; |PhyDmaSetUp|
EXPORT |PhyDmaRemoveChannel|
IMPORT |MmUnmapIoSpace|
IMPORT |XllpDmacFreeChannel|
IMPORT |HalFreeCommonBuffer|
00000 AREA |.text| { |PhyDmaRemoveChannel| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 AREA |.pdata$$PhyDmaRemoveChannel|, PDATA, SELECTION=5, ASSOC=|.text| { |PhyDmaRemoveChannel| } ; comdat associative
|$T39024| DCD |$L39023|
DCD 0x40001c02
; Function compile flags: /Ogsy
00000 AREA |.text| { |PhyDmaRemoveChannel| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 |PhyDmaRemoveChannel| PROC
; 68 : {
00000 |$L39023|
00000 e92d40f0 stmdb sp!, {r4 - r7, lr}
00004 e24dd014 sub sp, sp, #0x14
00008 |$M39021|
00008 e1a04000 mov r4, r0
; 69 : DMA_ADAPTER_OBJECT adapter;
; 70 :
; 71 : adapter.ObjectSize = sizeof(DMA_ADAPTER_OBJECT);
; 72 : adapter.InterfaceType = Internal;
; 73 : adapter.BusNumber = 0;
; 74 : //Interrupt has ended, free the descriptors memory allocated on channel config.
; 75 : HalFreeCommonBuffer( &adapter,
; 76 : sizeof(DMAC_FRAME_DESCRIPTOR_ST),
; 77 : dev->descPhyAddr,
; 78 : dev->desc,
; 79 : FALSE);
0000c e5941038 ldr r1, [r4, #0x38]
00010 e5942030 ldr r2, [r4, #0x30]
00014 e5943034 ldr r3, [r4, #0x34]
00018 e58d1000 str r1, [sp]
0001c e3a0e00c mov lr, #0xC
00020 e3a05000 mov r5, #0
00024 e3a06000 mov r6, #0
00028 e3a07000 mov r7, #0
0002c e3a01010 mov r1, #0x10
00030 e28d0008 add r0, sp, #8
00034 e1cde0b8 strh lr, [sp, #8]
00038 e58d500c str r5, [sp, #0xC]
0003c e58d6010 str r6, [sp, #0x10]
00040 e58d7004 str r7, [sp, #4]
00044 eb000000 bl HalFreeCommonBuffer
; 80 :
; 81 : XllpDmacFreeChannel(dev->channel, XLLP_DMAC_MEM2MEM_MOVE);
00048 e5940004 ldr r0, [r4, #4]
0004c e3a01063 mov r1, #0x63
00050 eb000000 bl XllpDmacFreeChannel
; 82 :
; 83 : MmUnmapIoSpace(dev->pDmacAddr, sizeof(DMAC_REGISTERS));
00054 e5940000 ldr r0, [r4]
00058 e3a01c11 mov r1, #0x11, 24
0005c e381102c orr r1, r1, #0x2C
00060 eb000000 bl MmUnmapIoSpace
; 84 : }
00064 e28dd014 add sp, sp, #0x14
00068 e8bd40f0 ldmia sp!, {r4 - r7, lr}
0006c e12fff1e bx lr
00070 |$M39022|
ENDP ; |PhyDmaRemoveChannel|
EXPORT |PhyDmaSendDescriptor|
; File e:\wm604\public\common\sdk\inc\kfuncs.h
00000 AREA |.text| { |PhyDmaSendDescriptor| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 AREA |.pdata$$PhyDmaSendDescriptor|, PDATA, SELECTION=5, ASSOC=|.text| { |PhyDmaSendDescriptor| } ; comdat associative
|$T39042| DCD |$L39041|
DCD 0x40005c02
; Function compile flags: /Ogsy
; File e:\wm604\platform\seuicbsp\src\drivers\dmbdrv\dmapxaxxx\pxadma.c
00000 AREA |.text| { |PhyDmaSendDescriptor| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 |PhyDmaSendDescriptor| PROC
; 88 : {
00000 |$L39041|
00000 e92d4070 stmdb sp!, {r4 - r6, lr}
00004 e24dd004 sub sp, sp, #4
00008 |$M39039|
00008 e1a03001 mov r3, r1
0000c e1a05000 mov r5, r0
; 89 : volatile DMAC_REGISTERS_P pDmacAddr;
; 90 : DWORD tmp;
; 91 : DMAC_FRAME_DESCRIPTOR_ST* desc;
; 92 : DMA_DESCRIPTOR_ST* dbDesc = transaction->desc;
; 93 :
; 94 : ResetEvent(dev->dmaIntEvent);
00010 e595000c ldr r0, [r5, #0xC]
00014 e5936000 ldr r6, [r3]
00018 e3a01002 mov r1, #2
0001c eb000000 bl EventModify
; 95 : pDmacAddr = dev->pDmacAddr;
; 96 :
; 97 : desc = dev->desc;
00020 e5954038 ldr r4, [r5, #0x38]
; 98 :
; 99 : desc->ddadr = 1;
00024 e5952000 ldr r2, [r5]
00028 e3a03001 mov r3, #1
0002c e5843000 str r3, [r4]
; 100 : desc->dsadr = dbDesc->srcPhyAddr;
00030 e5963000 ldr r3, [r6]
; 101 : desc->dtadr = dbDesc->dstPhyAddr;
; 102 : desc->dcmd = dbDesc->len;
; 103 :
; 104 : tmp = userBurstSizeToDmaConfig[dev->burstSize];
; 105 : desc->dcmd |= (tmp<<16); // BURST
00034 e58d2000 str r2, [sp]
00038 e59fe12c ldr lr, [pc, #0x12C]
0003c e5843004 str r3, [r4, #4]
00040 e5963004 ldr r3, [r6, #4]
00044 e28e100c add r1, lr, #0xC
00048 e5843008 str r3, [r4, #8]
0004c e5962008 ldr r2, [r6, #8]
00050 e584200c str r2, [r4, #0xC]
00054 e5953014 ldr r3, [r5, #0x14]
00058 e7913103 ldr r3, [r1, +r3, lsl #2]
0005c e1822803 orr r2, r2, r3, lsl #16
00060 e584200c str r2, [r4, #0xC]
; 106 : tmp = userBusWidthToDmaConfig[dev->busWidth];
; 107 : desc->dcmd |= (tmp<<14); // TRANSFER WIDTH
00064 e5953018 ldr r3, [r5, #0x18]
00068 e79e3103 ldr r3, [lr, +r3, lsl #2]
0006c e1822703 orr r2, r2, r3, lsl #14
00070 e584200c str r2, [r4, #0xC]
; 108 :
; 109 : if (dbDesc->flags & DMA_INC_SRC_ADDR)
00074 e596300c ldr r3, [r6, #0xC]
00078 e3130001 tst r3, #1
; 110 : desc->dcmd |= DMAC_DCMD_INCSRCADDR;
0007c 13823102 orrne r3, r2, #2, 2
00080 1584300c strne r3, [r4, #0xC]
; 111 : if (dbDesc->flags & DMA_INC_DST_ADDR)
00084 e596300c ldr r3, [r6, #0xC]
00088 e3130002 tst r3, #2
; 112 : desc->dcmd |= DMAC_DCMD_INCTRGADDR;
0008c 1594300c ldrne r3, [r4, #0xC]
00090 13833101 orrne r3, r3, #1, 2
00094 1584300c strne r3, [r4, #0xC]
; 113 :
; 114 : if (dbDesc->flags & DMA_USE_DST_FLOW_CONTROL)
00098 e596300c ldr r3, [r6, #0xC]
0009c e3130004 tst r3, #4
; 115 : desc->dcmd |= DMAC_DCMD_FLOWTRG;
000a0 1594300c ldrne r3, [r4, #0xC]
000a4 13833201 orrne r3, r3, #1, 4
000a8 1584300c strne r3, [r4, #0xC]
; 116 : if (dbDesc->flags & DMA_USE_SRC_FLOW_CONTROL)
000ac e596300c ldr r3, [r6, #0xC]
000b0 e3130008 tst r3, #8
; 117 : desc->dcmd |= DMAC_DCMD_FLOWSRC;
000b4 1594300c ldrne r3, [r4, #0xC]
000b8 13833202 orrne r3, r3, #2, 4
000bc 1584300c strne r3, [r4, #0xC]
; 118 :
; 119 :
; 120 : desc->dcmd |= DMAC_DCMD_ENDIRQEN; // Enable end interrupt for last descriptor.
000c0 e594300c ldr r3, [r4, #0xC]
000c4 e3833602 orr r3, r3, #2, 12
000c8 e584300c str r3, [r4, #0xC]
; 121 :
; 122 : if (dev->useHWFlowCtrl == TRUE)
000cc e595301c ldr r3, [r5, #0x1C]
000d0 e3530001 cmp r3, #1
; 123 : {//Request to Channel Map for DREQ
; 124 : pDmacAddr->drcmr1[dev->dmaReq] = DMAC_DRCRM_MAP_CHANNEL + dev->channel;
000d4 05952004 ldreq r2, [r5, #4]
000d8 05951010 ldreq r1, [r5, #0x10]
000dc 059d3000 ldreq r3, [sp]
000e0 02822080 addeq r2, r2, #0x80
000e4 00833101 addeq r3, r3, r1, lsl #2
000e8 05832100 streq r2, [r3, #0x100]
; 125 : }
; 126 :
; 127 :
; 128 : //Clear all existing interrupts and set mode to no descriptor fetch
; 129 : pDmacAddr->dcsr[dev->channel] = DMAC_DCSR_CLEAR_ALL_INTERRUPTS;
000ec e5952004 ldr r2, [r5, #4]
000f0 e59d3000 ldr r3, [sp]
000f4 e3a0101f mov r1, #0x1F
000f8 e7831102 str r1, [r3, +r2, lsl #2]
; 130 :
; 131 :
; 132 : // DALGN - DMA ALIGNMENT REG.
; 133 : if ((dbDesc[0].srcPhyAddr & 0x7) || (dbDesc[0].dstPhyAddr & 7))
000fc e5963000 ldr r3, [r6]
00100 e3130007 tst r3, #7
00104 05963004 ldreq r3, [r6, #4]
00108 03130007 tsteq r3, #7
; 134 : pDmacAddr->dalgn |= 1<channel;
; 135 : else
; 136 : pDmacAddr->dalgn &= ~(1<channel);
0010c 059d1000 ldreq r1, [sp]
00110 05952004 ldreq r2, [r5, #4]
00114 03a00001 moveq r0, #1
00118 05b130a0 ldreq r3, [r1, #0xA0]!
0011c 159d1000 ldrne r1, [sp]
00120 01c33210 biceq r3, r3, r0, lsl r2
00124 15b130a0 ldrne r3, [r1, #0xA0]!
00128 15952004 ldrne r2, [r5, #4]
0012c 13a00001 movne r0, #1
00130 11833210 orrne r3, r3, r0, lsl r2
00134 e5813000 str r3, [r1]
; 137 :
; 138 : //Set DMA first descriptor
; 139 : pDmacAddr->ddg[dev->channel].ddadr = dev->descPhyAddr.LowPart;
00138 e59d3000 ldr r3, [sp]
; 140 :
; 141 : // Start Running
; 142 : pDmacAddr->dcsr[dev->channel] = DMAC_DCSR_RUN;// | DMAC_DCSR_EORIRQEN;
0013c e59de000 ldr lr, [sp]
00140 e5951004 ldr r1, [r5, #4]
00144 e5952030 ldr r2, [r5, #0x30]
00148 e0833201 add r3, r3, r1, lsl #4
0014c e5832200 str r2, [r3, #0x200]
00150 e5953004 ldr r3, [r5, #4]
00154 e3a02102 mov r2, #2, 2
; 143 :
; 144 :
; 145 : return TRUE;
00158 e3a00001 mov r0, #1
0015c e78e2103 str r2, [lr, +r3, lsl #2]
; 146 : }
00160 e28dd004 add sp, sp, #4
00164 e8bd4070 ldmia sp!, {r4 - r6, lr}
00168 e12fff1e bx lr
0016c |$L39044|
0016c 00000000 DCD |userBusWidthToDmaConfig|
00170 |$M39040|
ENDP ; |PhyDmaSendDescriptor|
EXPORT |PhyDmaIntHandler|
IMPORT |GetEventData|
00000 AREA |.text| { |PhyDmaIntHandler| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 AREA |.pdata$$PhyDmaIntHandler|, PDATA, SELECTION=5, ASSOC=|.text| { |PhyDmaIntHandler| } ; comdat associative
|$T39054| DCD |$L39053|
DCD 0x40000a01
; Function compile flags: /Ogsy
00000 AREA |.text| { |PhyDmaIntHandler| }, CODE, ARM, SELECTION=1 ; comdat noduplicate
00000 |PhyDmaIntHandler| PROC
; 149 : {
00000 |$L39053|
00000 e52de004 str lr, [sp, #-4]!
00004 |$M39051|
; 150 : DWORD stReg;
; 151 :
; 152 : stReg = GetEventData(dev->dmaIntEvent);
00004 e590000c ldr r0, [r0, #0xC]
00008 eb000000 bl GetEventData
; 153 : //RETAILMSG(1, (TEXT("DMB dma int.\r\n")));
; 154 :
; 155 : //Check that status returned from DMA controllers is good.
; 156 : if (stReg & DMAC_DCSR_ENDINTR || stReg & DMAC_DCSR_EORINT)
0000c e3100004 tst r0, #4
00010 03100c02 tsteq r0, #2, 24
; 158 : else
; 159 : return DMA_STATUS_ERR;
00014 03e00000 mvneq r0, #0
; 160 : }
00018 049de004 ldreq lr, [sp], #4
; 157 : return DMA_STATUS_OK;
0001c 13a00000 movne r0, #0
; 160 : }
00020 149de004 ldrne lr, [sp], #4
00024 e12fff1e bx lr
00028 |$M39052|
ENDP ; |PhyDmaIntHandler|
END