www.pudn.com > multiprocessor.rar > pio_led2.v

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// synthesis translate_off 
`timescale 1ns / 1ps 
// synthesis translate_on 
 
// turn off superfluous verilog processor warnings  
// altera message_level Level1  
// altera message_off 10034 10035 10036 10037 10230 10240 10030  
 
module pio_led2 ( 
                  // inputs: 
                   address, 
                   chipselect, 
                   clk, 
                   reset_n, 
                   write_n, 
                   writedata, 
 
                  // outputs: 
                   out_port 
                ) 
; 
 
  output  [  1: 0] out_port; 
  input   [  1: 0] address; 
  input            chipselect; 
  input            clk; 
  input            reset_n; 
  input            write_n; 
  input   [  1: 0] writedata; 
 
  wire             clk_en; 
  reg     [  1: 0] data_out; 
  wire    [  1: 0] out_port; 
  assign clk_en = 1; 
  //s1, which is an e_avalon_slave 
  always @(posedge clk or negedge reset_n) 
    begin 
      if (reset_n == 0) 
          data_out <= 0; 
      else if (chipselect && ~write_n && (address == 0)) 
          data_out <= writedata[1 : 0]; 
    end 
 
 
  assign out_port = data_out; 
 
endmodule