www.pudn.com > USRP_REV_4_2.rar > dboard.sch


v 20060906 1
C 80200 45300 1 0 0 ad986X-ACTRL.sym
{
T 81600 48200 5 10 1 1 0 6 1
refdes=U602
T 80600 48100 5 10 0 0 0 0 1
device=AD986X
T 80600 48300 5 10 0 0 0 0 1
footprint=LQFP128
}
C 88000 45300 1 0 0 ad986X-AUX.sym
{
T 89400 48200 5 10 1 1 0 6 1
refdes=U602
T 88400 48100 5 10 0 0 0 0 1
device=AD986X
T 88400 48300 5 10 0 0 0 0 1
footprint=LQFP128
}
C 82000 39900 1 0 0 ad986X-CTRL.sym
{
T 83500 43900 5 10 1 1 0 6 1
refdes=U602
T 82400 43900 5 10 0 0 0 0 1
device=AD986X
T 82400 44100 5 10 0 0 0 0 1
footprint=LQFP128
}
C 79100 36200 1 270 1 pmc64.sym
{
T 92300 36900 5 10 1 1 90 2 1
refdes=J669
T 79100 36200 5 10 0 1 0 0 1
footprint=pmc
T 71700 38600 5 10 0 0 0 0 1
device=PMC64
}
C 79100 31000 1 270 1 pmc64.sym
{
T 92300 31700 5 10 1 1 90 2 1
refdes=J668
T 79100 31000 5 10 0 1 180 6 1
footprint=pmc
T 71700 33400 5 10 0 0 0 0 1
device=PMC64
}
C 77900 47200 1 90 1 generic-power.sym
{
T 77650 47000 5 10 1 1 270 5 1
net=AGND_2:1
}
C 79200 46800 1 0 1 capacitor-1.sym
{
T 78600 46800 5 10 1 1 0 6 1
refdes=C714
T 78200 47200 5 10 1 1 180 6 1
value=0.1uF
T 79200 46800 5 10 0 1 90 2 1
footprint=0603
T 79400 47500 5 10 0 0 0 0 1
device=CAPACITOR
T 79400 47700 5 10 0 0 0 0 1
symversion=0.1
}
N 80300 47000 79200 47000 4
N 78300 47000 77900 47000 4
C 79200 47500 1 180 1 resistor-1.sym
{
T 80200 47500 5 10 1 1 0 6 1
value=4K
T 79200 47500 5 10 0 1 180 6 1
footprint=0603
T 79300 47500 5 10 1 1 0 6 1
refdes=R702
T 79500 47900 5 10 0 0 0 0 1
device=RESISTOR
}
N 80300 47400 80100 47400 4
N 79200 47400 78100 47400 4
N 78100 47400 78100 47000 4
C 84900 47000 1 270 0 generic-power.sym
{
T 85150 46800 5 10 1 1 270 3 1
net=AGND_2:1
}
C 84600 46400 1 180 0 capacitor-1.sym
{
T 83600 46300 5 10 1 1 0 0 1
refdes=C702
T 83600 46000 5 10 1 1 0 0 1
value=0.1uF
T 84600 46400 5 10 0 1 270 0 1
footprint=0603
T 84800 47100 5 10 0 0 0 0 1
device=CAPACITOR
T 84800 47300 5 10 0 0 0 0 1
symversion=0.1
}
N 82300 46600 82500 46600 4
N 82500 46600 82500 46200 4
N 82300 46200 83700 46200 4
N 82300 47400 83700 47400 4
N 82500 47400 82500 47000 4
N 82500 47000 82300 47000 4
C 84600 47600 1 180 0 capacitor-1.sym
{
T 83600 47500 5 10 1 1 0 0 1
refdes=C703
T 83600 47200 5 10 1 1 0 0 1
value=0.1uF
T 84600 47600 5 10 0 1 270 0 1
footprint=0603
T 84800 48300 5 10 0 0 0 0 1
device=CAPACITOR
T 84800 48500 5 10 0 0 0 0 1
symversion=0.1
}
N 84700 46800 84900 46800 4
N 84600 47400 84700 47400 4
N 84600 46200 84700 46200 4
C 82600 47300 1 270 0 capacitor-1.sym
{
T 83100 47100 5 10 1 1 180 0 1
refdes=C704
T 83000 46300 5 10 1 1 90 0 1
value=0.1uF
T 82600 47300 5 10 0 1 0 0 1
footprint=0603
T 82800 48000 5 10 0 0 0 0 1
device=CAPACITOR
T 82800 48200 5 10 0 0 0 0 1
symversion=0.1
}
C 83100 47300 1 270 0 capacitor-1.sym
{
T 83600 47100 5 10 1 1 180 0 1
refdes=C705
T 83500 46300 5 10 1 1 90 0 1
value=10uF
T 83100 47300 5 10 0 1 0 0 1
footprint=1206
T 83300 48000 5 10 0 0 0 0 1
device=CAPACITOR
T 83300 48200 5 10 0 0 0 0 1
symversion=0.1
}
N 82800 47300 82800 47400 4
N 83300 47300 83300 47400 4
N 82800 46400 82800 46200 4
N 83300 46400 83300 46200 4
C 82500 45100 1 0 0 capacitor-1.sym
{
T 82400 45500 5 10 1 1 0 0 1
refdes=C706
T 83500 45500 5 10 1 1 180 0 1
value=0.1uF
T 82500 45100 5 10 0 1 90 0 1
footprint=0603
T 82700 45800 5 10 0 0 0 0 1
device=CAPACITOR
T 82700 46000 5 10 0 0 0 0 1
symversion=0.1
}
C 82500 45600 1 0 0 capacitor-1.sym
{
T 82400 45900 5 10 1 1 0 0 1
refdes=C707
T 83500 46000 5 10 1 1 180 0 1
value=10uF
T 82500 45600 5 10 0 1 90 0 1
footprint=1206
T 82700 46300 5 10 0 0 0 0 1
device=CAPACITOR
T 82700 46500 5 10 0 0 0 0 1
symversion=0.1
}
N 83400 45300 83600 45300 4
N 83600 45300 83600 45800 4
N 82500 45800 82300 45800 4
N 82500 45300 82400 45300 4
N 83400 45800 84700 45800 4
N 84700 45800 84700 47400 4
N 83800 32500 83800 36300 4
{
T 83800 33700 5 10 1 1 90 0 1
netname=RS232_TXD_2
}
N 82600 32500 82600 36300 4
{
T 82600 34200 5 10 1 1 90 0 1
netname=SDA
}
N 82200 32500 82200 36300 4
{
T 82200 34200 5 10 1 1 90 0 1
netname=SCL
}
C 92000 30900 1 180 0 generic-power.sym
{
T 91800 30650 5 10 1 1 180 3 1
net=AGND_2:1
}
C 81200 35800 1 180 0 generic-power.sym
{
T 81000 35550 5 10 1 1 180 3 1
net=DVDD:1
}
N 91800 30900 91800 31100 4
C 83300 35500 1 0 0 gnd-1.sym
N 83000 35800 83000 36300 4
N 83400 35800 83400 36300 4
N 83000 32500 83000 33000 4
N 83400 32500 83400 33000 4
C 83200 33000 1 0 0 generic-power.sym
{
T 83400 33250 5 10 1 1 0 3 1
net=DVDD:1
}
T 83300 34000 9 10 1 0 90 0 1
I2C Address
C 79500 33100 1 180 0 gnd-1.sym
N 79400 32500 79400 32800 4
C 79500 38300 1 180 0 gnd-1.sym
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C 79300 35700 1 0 0 gnd-1.sym
N 79400 36300 79400 36000 4
C 79300 30500 1 0 0 gnd-1.sym
N 79400 31100 79400 30800 4
C 92000 36100 1 180 0 generic-power.sym
{
T 91800 35850 5 10 1 1 180 3 1
net=AGND_2:1
}
N 91800 36100 91800 36300 4
C 91600 32700 1 0 0 generic-power.sym
{
T 91800 32950 5 10 1 1 0 3 1
net=AGND_2:1
}
N 91800 32700 91800 32500 4
N 85000 32500 85000 36300 4
{
T 85000 34300 5 10 1 1 90 0 1
netname=SCLK
}
N 84600 32500 84600 36300 4
{
T 84600 33700 5 10 1 1 90 0 1
netname=RESET_CODEC
}
N 85400 32500 85400 36300 4
{
T 85400 34300 5 10 1 1 90 0 1
netname=SDO
}
N 86200 35100 86200 36300 4
{
T 86200 35200 5 10 1 1 90 0 1
netname=SEN_TX_B
}
N 86200 32500 86200 33700 4
{
T 86200 32600 5 10 1 1 90 0 1
netname=SEN_RX_B
}
C 86500 30600 1 0 0 gnd-1.sym
N 86600 31100 86600 30900 4
C 86700 38200 1 180 0 gnd-1.sym
N 86600 37700 86600 37900 4
C 86500 35800 1 0 0 gnd-1.sym
N 86600 36300 86600 36100 4
C 86700 33000 1 180 0 gnd-1.sym
N 86600 32500 86600 32700 4
C 87600 30900 1 180 0 generic-power.sym
{
T 87400 30650 5 10 1 1 180 3 1
net=AGND_2:1
}
N 87400 30900 87400 31100 4
C 87600 36100 1 180 0 generic-power.sym
{
T 87400 35850 5 10 1 1 180 3 1
net=AGND_2:1
}
N 87400 36100 87400 36300 4
C 87200 37900 1 0 0 generic-power.sym
{
T 87400 38150 5 10 1 1 0 3 1
net=AGND_2:1
}
N 87400 37900 87400 37700 4
C 87200 32700 1 0 0 generic-power.sym
{
T 87400 32950 5 10 1 1 0 3 1
net=AGND_2:1
}
N 87400 32700 87400 32500 4
N 85800 32500 85800 36300 4
{
T 85800 34300 5 10 1 1 90 0 1
netname=SDI
}
N 89000 32500 89000 36300 4
{
T 89000 33800 5 10 1 1 90 0 1
netname=AUX_DAC_D_B
}
N 89400 32500 89400 36300 4
{
T 89400 33800 5 10 1 1 90 0 1
netname=AUX_DAC_A_B
}
N 89800 32500 89800 36300 4
{
T 89800 33800 5 10 1 1 90 0 1
netname=AUX_DAC_B_B
}
N 90200 32500 90200 36300 4
{
T 90200 33800 5 10 1 1 90 0 1
netname=AUX_DAC_C_B
}
N 91000 34700 91000 36300 4
{
T 91000 34700 5 10 1 1 90 0 1
netname=AUX_ADC_A2_B
}
N 90600 32500 90600 36300 4
{
T 90600 33700 5 10 1 1 90 0 1
netname=AUX_ADC_REF_B
}
N 91000 32500 91000 34100 4
{
T 91000 32500 5 10 1 1 90 0 1
netname=AUX_ADC_A1_B
}
N 91400 34700 91400 36300 4
{
T 91400 34700 5 10 1 1 90 0 1
netname=AUX_ADC_B2_B
}
N 91400 32500 91400 34100 4
{
T 91400 32500 5 10 1 1 90 0 1
netname=AUX_ADC_B1_B
}
C 90800 30900 1 180 0 generic-power.sym
{
T 90600 30650 5 10 1 1 180 3 1
net=AGND_2:1
}
N 90600 30900 90600 31100 4
C 90000 30900 1 180 0 generic-power.sym
{
T 89800 30650 5 10 1 1 180 3 1
net=AGND_2:1
}
N 89800 30900 89800 31100 4
C 88800 30900 1 180 0 generic-power.sym
{
T 88600 30650 5 10 1 1 180 3 1
net=AGND_2:1
}
N 88600 30900 88600 31100 4
N 91400 29500 91400 31100 4
{
T 91400 29500 5 10 1 1 90 0 1
netname=VINP_A_B
}
N 91000 29500 91000 31100 4
{
T 91000 29500 5 10 1 1 90 0 1
netname=VINN_A_B
}
N 89000 29500 89000 31100 4
{
T 89000 29500 5 10 1 1 90 0 1
netname=VINP_B_B
}
N 89400 29500 89400 31100 4
{
T 89400 29500 5 10 1 1 90 0 1
netname=VINN_B_B
}
N 90200 31100 90200 29500 4
{
T 90200 29600 5 10 1 1 90 0 1
netname=VREF_B
}
C 92000 37900 1 0 1 generic-power.sym
{
T 91800 38150 5 10 1 1 0 3 1
net=AGND_2:1
}
N 91800 37900 91800 37700 4
C 90800 37900 1 0 1 generic-power.sym
{
T 90600 38150 5 10 1 1 0 3 1
net=AGND_2:1
}
N 90600 37900 90600 37700 4
C 90000 37900 1 0 1 generic-power.sym
{
T 89800 38150 5 10 1 1 0 3 1
net=AGND_2:1
}
N 89800 37900 89800 37700 4
C 88800 37900 1 0 1 generic-power.sym
{
T 88600 38150 5 10 1 1 0 3 1
net=AGND_2:1
}
N 88600 37900 88600 37700 4
N 91000 39300 91000 37700 4
{
T 91000 38300 5 10 1 1 90 0 1
netname=IOUTP_A_B
}
N 91400 39300 91400 37700 4
{
T 91400 38300 5 10 1 1 90 0 1
netname=IOUTN_A_B
}
N 89400 39300 89400 37700 4
{
T 89400 38300 5 10 1 1 90 0 1
netname=IOUTP_B_B
}
N 89000 39300 89000 37700 4
{
T 89000 38300 5 10 1 1 90 0 1
netname=IOUTN_B_B
}
N 90200 37700 90200 39300 4
{
T 90200 38400 5 10 1 1 90 0 1
netname=REFIO_B
}
C 88800 36100 1 180 0 generic-power.sym
{
T 88600 35850 5 10 1 1 180 3 1
net=AGND_2:1
}
N 88600 36100 88600 36300 4
C 88400 32700 1 0 0 generic-power.sym
{
T 88600 32950 5 10 1 1 0 3 1
net=AGND_2:1
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N 88600 32700 88600 32500 4
C 88000 33300 1 0 0 generic-power.sym
{
T 88200 33550 5 10 1 1 0 3 1
net=AVDD_2:1
}
N 87800 32500 87800 33000 4
N 88200 32500 88200 33300 4
C 87600 33000 1 0 0 generic-power.sym
{
T 87800 33250 5 10 1 1 0 3 1
net=AVDD_2:1
}
C 88000 35500 1 180 1 generic-power.sym
{
T 88200 35250 5 10 1 1 180 3 1
net=AVDD_2:1
}
N 87800 36300 87800 35800 4
N 88200 36300 88200 35500 4
C 87600 35800 1 180 1 generic-power.sym
{
T 87800 35550 5 10 1 1 180 3 1
net=AVDD_2:1
}
C 79600 33200 1 0 0 generic-power.sym
{
T 79800 33450 5 10 1 1 0 3 1
net=5V:1
}
C 88000 30300 1 180 1 generic-power.sym
{
T 88200 30050 5 10 1 1 180 3 1
net=AVDD_2:1
}
N 88200 31100 88200 30300 4
N 87800 31100 87800 30600 4
C 87600 30600 1 180 1 generic-power.sym
{
T 87800 30350 5 10 1 1 180 3 1
net=AVDD_2:1
}
N 88200 37700 88200 38500 4
N 87800 37700 87800 38200 4
C 87600 38200 1 0 0 generic-power.sym
{
T 87800 38450 5 10 1 1 0 3 1
net=AVDD_2:1
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C 88000 38500 1 0 0 generic-power.sym
{
T 88200 38750 5 10 1 1 0 3 1
net=AVDD_2:1
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N 79800 32500 79800 33200 4
N 80200 32500 80200 33000 4
N 80200 36300 80200 36000 4
N 79800 36300 79800 35600 4
C 80000 35600 1 180 0 generic-power.sym
{
T 79800 35350 5 10 1 1 180 3 1
net=5V:1
}
C 80800 33000 1 0 0 generic-power.sym
{
T 81000 33250 5 10 1 1 0 3 1
net=DVDD:1
}
N 81000 32500 81000 33000 4
N 81000 35800 81000 36300 4
N 90900 47400 92500 47400 4
{
T 91200 47400 5 10 1 1 0 0 1
netname=SIGDEL_B
}
N 90900 47000 92500 47000 4
{
T 91000 47000 5 10 1 1 0 0 1
netname=AUX_DAC_A_B
}
N 90900 46600 92500 46600 4
{
T 91000 46600 5 10 1 1 0 0 1
netname=AUX_DAC_B_B
}
N 90900 46200 92500 46200 4
{
T 91000 46200 5 10 1 1 0 0 1
netname=AUX_DAC_C_B
}
N 86200 45800 88100 45800 4
{
T 86300 45800 5 10 1 1 0 0 1
netname=AUX_ADC_REF_B
}
N 86500 47000 88100 47000 4
{
T 86500 47000 5 10 1 1 0 0 1
netname=AUX_ADC_A2_B
}
N 86500 46200 88100 46200 4
{
T 86500 46200 5 10 1 1 0 0 1
netname=AUX_ADC_B2_B
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N 86500 46600 88100 46600 4
{
T 86500 46600 5 10 1 1 0 0 1
netname=AUX_ADC_B1_B
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N 86500 47400 88100 47400 4
{
T 86500 47400 5 10 1 1 0 0 1
netname=AUX_ADC_A1_B
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N 78200 46300 79800 46300 4
{
T 78600 46300 5 10 1 1 0 0 1
netname=REFIO_B
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N 84000 44800 82400 44800 4
{
T 82800 44800 5 10 1 1 0 0 1
netname=VREF_B
}
N 79800 46300 79800 47000 4
N 82400 44800 82400 45800 4
N 80400 41600 82100 41600 4
{
T 80500 41600 5 10 1 1 0 0 1
netname=RESET_CODEC
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N 80600 32500 80600 32800 4
N 80200 33000 79800 33000 4
N 80600 32800 81000 32800 4
N 80600 36300 80600 36000 4
N 80600 36000 81000 36000 4
N 80200 36000 79800 36000 4
N 80400 42000 82100 42000 4
{
T 80500 42000 5 10 1 1 0 0 1
netname=SEN_CODEC_B
}
N 81100 43200 82100 43200 4
{
T 81400 43200 5 10 1 1 0 0 1
netname=SCLK
}
N 81100 42800 82100 42800 4
{
T 81400 42800 5 10 1 1 0 0 1
netname=SDO
}
N 81100 42400 82100 42400 4
{
T 81500 42400 5 10 1 1 0 0 1
netname=SDI
}
C 64100 45300 1 0 0 ad986X-ACTRL.sym
{
T 65500 48200 5 10 1 1 0 6 1
refdes=U601
T 64500 48100 5 10 0 0 0 0 1
device=AD986X
T 64500 48300 5 10 0 0 0 0 1
footprint=LQFP128
}
C 71900 45300 1 0 0 ad986X-AUX.sym
{
T 73300 48200 5 10 1 1 0 6 1
refdes=U601
T 72300 48100 5 10 0 0 0 0 1
device=AD986X
T 72300 48300 5 10 0 0 0 0 1
footprint=LQFP128
}
C 65900 39900 1 0 0 ad986X-CTRL.sym
{
T 67400 43900 5 10 1 1 0 6 1
refdes=U601
T 66300 43900 5 10 0 0 0 0 1
device=AD986X
T 66300 44100 5 10 0 0 0 0 1
footprint=LQFP128
}
C 63000 36200 1 270 1 pmc64.sym
{
T 76200 36900 5 10 1 1 90 2 1
refdes=J667
T 63000 36200 5 10 0 1 0 0 1
footprint=pmc
T 55600 38600 5 10 0 0 0 0 1
device=PMC64
}
C 63000 31000 1 270 1 pmc64.sym
{
T 76200 31700 5 10 1 1 90 2 1
refdes=J666
T 63000 31000 5 10 0 1 180 6 1
footprint=pmc
T 55600 33400 5 10 0 0 0 0 1
device=PMC64
}
C 61800 47200 1 90 1 generic-power.sym
{
T 61550 47000 5 10 1 1 270 5 1
net=AGND_1:1
}
C 63100 46800 1 0 1 capacitor-1.sym
{
T 62500 46800 5 10 1 1 0 6 1
refdes=C701
T 62100 47200 5 10 1 1 180 6 1
value=0.1uF
T 63100 46800 5 10 0 1 90 2 1
footprint=0603
T 63300 47500 5 10 0 0 0 0 1
device=CAPACITOR
T 63300 47700 5 10 0 0 0 0 1
symversion=0.1
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N 64200 47000 63100 47000 4
N 62200 47000 61800 47000 4
C 63100 47500 1 180 1 resistor-1.sym
{
T 64100 47500 5 10 1 1 0 6 1
value=4K
T 63100 47500 5 10 0 1 180 6 1
footprint=0603
T 63300 47500 5 10 1 1 0 6 1
refdes=R701
T 63400 47900 5 10 0 0 0 0 1
device=RESISTOR
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N 64200 47400 64000 47400 4
N 63100 47400 62000 47400 4
N 62000 47400 62000 47000 4
C 68800 47000 1 270 0 generic-power.sym
{
T 69050 46800 5 10 1 1 270 3 1
net=AGND_1:1
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C 68500 46400 1 180 0 capacitor-1.sym
{
T 67500 46300 5 10 1 1 0 0 1
refdes=C708
T 67500 46000 5 10 1 1 0 0 1
value=0.1uF
T 68500 46400 5 10 0 1 270 0 1
footprint=0603
T 68700 47100 5 10 0 0 0 0 1
device=CAPACITOR
T 68700 47300 5 10 0 0 0 0 1
symversion=0.1
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N 66200 46600 66400 46600 4
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N 66200 46200 67600 46200 4
N 66200 47400 67600 47400 4
N 66400 47400 66400 47000 4
N 66400 47000 66200 47000 4
C 68500 47600 1 180 0 capacitor-1.sym
{
T 67500 47500 5 10 1 1 0 0 1
refdes=C709
T 67500 47200 5 10 1 1 0 0 1
value=0.1uF
T 68500 47600 5 10 0 1 270 0 1
footprint=0603
T 68700 48300 5 10 0 0 0 0 1
device=CAPACITOR
T 68700 48500 5 10 0 0 0 0 1
symversion=0.1
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N 68600 46800 68800 46800 4
N 68500 47400 68600 47400 4
N 68500 46200 68600 46200 4
C 66500 47300 1 270 0 capacitor-1.sym
{
T 67000 47100 5 10 1 1 180 0 1
refdes=C710
T 66900 46300 5 10 1 1 90 0 1
value=0.1uF
T 66500 47300 5 10 0 1 0 0 1
footprint=0603
T 66700 48000 5 10 0 0 0 0 1
device=CAPACITOR
T 66700 48200 5 10 0 0 0 0 1
symversion=0.1
}
C 67000 47300 1 270 0 capacitor-1.sym
{
T 67500 47100 5 10 1 1 180 0 1
refdes=C711
T 67400 46300 5 10 1 1 90 0 1
value=10uF
T 67000 47300 5 10 0 1 0 0 1
footprint=1206
T 67200 48000 5 10 0 0 0 0 1
device=CAPACITOR
T 67200 48200 5 10 0 0 0 0 1
symversion=0.1
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N 66700 47300 66700 47400 4
N 67200 47300 67200 47400 4
N 66700 46400 66700 46200 4
N 67200 46400 67200 46200 4
C 66400 45100 1 0 0 capacitor-1.sym
{
T 66300 45400 5 10 1 1 0 0 1
refdes=C712
T 67400 45500 5 10 1 1 180 0 1
value=0.1uF
T 66400 45100 5 10 0 1 90 0 1
footprint=0603
T 66600 45800 5 10 0 0 0 0 1
device=CAPACITOR
T 66600 46000 5 10 0 0 0 0 1
symversion=0.1
}
C 66400 45600 1 0 0 capacitor-1.sym
{
T 66300 45900 5 10 1 1 0 0 1
refdes=C713
T 67400 46000 5 10 1 1 180 0 1
value=10uF
T 66400 45600 5 10 0 1 90 0 1
footprint=1206
T 66600 46300 5 10 0 0 0 0 1
device=CAPACITOR
T 66600 46500 5 10 0 0 0 0 1
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N 67300 45300 67500 45300 4
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N 66400 45800 66200 45800 4
N 66400 45300 66300 45300 4
N 67300 45800 68600 45800 4
N 68600 45800 68600 47400 4
N 84200 32500 84200 36300 4
{
T 84200 33700 5 10 1 1 90 0 1
netname=RS232_RXD_2
}
N 68100 32500 68100 36300 4
{
T 68100 33800 5 10 1 1 90 0 1
netname=RS232_RXD_1
}
N 67700 32500 67700 36300 4
{
T 67700 33800 5 10 1 1 90 0 1
netname=RS232_TXD_1
}
N 66500 32500 66500 36300 4
{
T 66500 34200 5 10 1 1 90 0 1
netname=SDA
}
N 66100 32500 66100 36300 4
{
T 66100 34200 5 10 1 1 90 0 1
netname=SCL
}
C 75900 30900 1 180 0 generic-power.sym
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I2C Address
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date=$Date: 2005/12/15 20:33:53 $
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C 73100 42700 1 0 0 resistor-1.sym
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T 73300 43000 5 10 1 1 0 0 1
refdes=R1004
T 73300 42500 5 10 1 1 0 0 1
value=100
T 73100 42700 5 10 0 1 0 0 1
footprint=0603
T 73400 43100 5 10 0 0 0 0 1
device=RESISTOR
}
C 74100 42600 1 270 0 capacitor-1.sym
{
T 73600 41800 5 10 1 1 0 0 1
refdes=C1004
T 73800 41600 5 10 1 1 0 0 1
value=1uF
T 74100 42600 5 10 0 1 0 0 1
footprint=1206
T 74300 43300 5 10 0 0 0 0 1
device=CAPACITOR
T 74300 43500 5 10 0 0 0 0 1
symversion=0.1
}
N 72600 42800 73100 42800 4
N 72900 42600 72900 42800 4
N 74300 42800 74300 42600 4
C 73700 41300 1 180 0 generic-power.sym
{
T 73500 41050 5 10 1 1 180 3 1
net=AGND_1:1
}
N 72900 41700 72900 41500 4
N 72900 41500 74300 41500 4
N 74300 41500 74300 41700 4
N 73500 41300 73500 41500 4
N 74000 42800 75400 42800 4
{
T 74300 42800 5 10 1 1 0 0 1
netname=AUX_DAC_D_A
}
N 70100 42800 71700 42800 4
{
T 70400 42800 5 10 1 1 0 0 1
netname=SIGDEL_A
}
C 63800 38300 1 180 0 gnd-1.sym
N 63700 37700 63700 38000 4
C 63600 30500 1 0 0 gnd-1.sym
N 63700 31100 63700 30800 4
C 79900 38300 1 180 0 gnd-1.sym
N 79800 37700 79800 38000 4
C 79700 30500 1 0 0 gnd-1.sym
N 79800 31100 79800 30800 4
N 65300 32500 65300 36300 4
{
T 65300 33900 5 10 1 1 90 0 1
netname=clock_db_a_p
}
N 65700 32500 65700 36300 4
{
T 65700 33900 5 10 1 1 90 0 1
netname=clock_db_a_n
}
N 81400 32500 81400 36300 4
{
T 81400 33800 5 10 1 1 90 0 1
netname=clock_db_b_p
}
N 81800 32500 81800 36300 4
{
T 81800 33800 5 10 1 1 90 0 1
netname=clock_db_b_n
}