www.pudn.com > jtagsrc.rar > arm7tdmi.h

/* 
 * arm7tdmi.h:  
 * 
 * Copyright (C) 2004, OPEN-JTAG, All rights reserved. 
 */ 
 
#ifndef XJTAG_ARM7TDMI_H 
#define XJTAG_ARM7TDMI_H 
 
typedef struct arm7tdmi_status{ 
	int state;						//Debug or System 
	int from;						//From ARM mode or THUMB mode 
	int by;							//By DBGRQ, BREAKPT or WATCHPT 
	int endian;						//Little endian or Big endian 
	int scanchain;					//Current active scan chain 
}arm7tdmi_status_t; 
 
 
typedef struct arm7tdmi_breakpt_list{ 
	u32 address; 
	u32 instruct; 
	int type; 
	struct arm7tdmi_breakpt_list *next; 
}arm7tdmi_breakpt_list_t; 
 
typedef struct arm7tdmi_watchpt_status{ 
	int busy; 
	u32 addr; 
}arm7tdmi_watchpt_status_t; 
 
#define HARDWARE_BREAKPT	0 
#define SOFTWARE_BREAKPT	1 
 
 
/* 
 * ARM7TDMI core registers 
 */ 
#define ARM7TDMI_R0			0 
#define ARM7TDMI_R1			1 
#define ARM7TDMI_R2			2 
#define ARM7TDMI_R3			3 
#define ARM7TDMI_R4			4 
#define ARM7TDMI_R5			5 
#define ARM7TDMI_R6			6 
#define ARM7TDMI_R7			7 
#define ARM7TDMI_R8			8 
#define ARM7TDMI_R9			9 
#define ARM7TDMI_R10		10 
#define ARM7TDMI_R11		11 
#define ARM7TDMI_R12		12 
#define ARM7TDMI_R13		13 
#define ARM7TDMI_R14		14 
#define ARM7TDMI_R15		15 
#define ARM7TDMI_PC			15 
#define ARM7TDMI_CPSR		16 
#define ARM7TDMI_SPSR		17 
 
#define ARM7TDMI_REG_STALE			 0 
#define ARM7TDMI_REG_FRESH			 1 
#define ARM7TDMI_REG_UNAVAILABLE	-1 
 
 
 
/* 
 * Used to indicate the state of the target 
 */ 
#define ARM7TDMI_SYSTEM_STATE			0 
#define ARM7TDMI_DEBUG_STATE			1 
 
 
/* 
 * Used to indicate the target enter the HALT mode 
 * from ARM state or THUMB state 
 */ 
#define ARM7TDMI_FROM_ARM				0 
#define ARM7TDMI_FROM_THUMB				1 
 
 
/* 
 * The ARM7TDMI processor is forced into debug state following  
 * a breakpoint, watchpoint, or debug request. 
 * 
 * Following definition is used to indicate how the target enter  
 * HALT mode 
 */ 
#define ARM7TDMI_BY_BREAKPT				0 
#define ARM7TDMI_BY_WATCHPT				1 
#define ARM7TDMI_BY_DEBUGRQ				2 
 
 
/* 
 * Used to indicate the endian of the target 
 */ 
#define ARM7TDMI_LITTLE_END				0 
#define ARM7TDMI_BIG_END				1 
 
/* 
 * Used to indicate the execute speed of next 
 * instruction. 
 */ 
#define ARM7TDMI_DEBUG_SPEED			0 
#define ARM7TDMI_SYSTEM_SPEED			1 
 
 
/*  
 * Some instructions to be executed frequently 
 * during the debug process 
 */ 
#define ARM7TDMI_NOP					0xE1A00000		//NULL OPERATION	 
 
 
/* There are seven test data registers that can be connected 
 * between TDI and TDO  
 *	1). Bypass register 
 *	2). ARM7TDMI core device ID register 
 *  3). Instruction register			 
 *  4). Scan path select retister 
 *  5). Scan chain 0, 1, 2 and 3 
 */   
 
#define ARM7TDMI_NUMOF_SCANCHAIN		4 
 
 
//Bit width of test data registers 
#define ARM7TDMI_REGLEN_BYPASS			1 
#define ARM7TDMI_REGLEN_IDCODE			32 
#define ARM7TDMI_REGLEN_INSTRUCT		4 
#define ARM7TDMI_REGLEN_SCSEL		 	4 
#define ARM7TDMI_REGLEN_SC0	 			113 
#define ARM7TDMI_REGLEN_SC1				33 
#define ARM7TDMI_REGLEN_SC2				38 
 
 
 
 
 
/********************************************************************/ 
 
extern arm7tdmi_status_t arm7tdmi_status; 
extern u32 arm7tdmi_register[18][2]; 
 
 
extern int arm7tdmi_init(void); 
extern int arm7tdmi_system_reset(void); 
extern int arm7tdmi_connect_scanchain(int sc_num); 
extern int arm7tdmi_acs_sc1(u32 *shift_in, u32 *shift_out); 
 
 
extern int arm7tdmi_enter_dbgstat(u32 *pc); 
extern int arm7tdmi_check_dbgstat(u32 *pc); 
extern int arm7tdmi_exit_dbgstat(u32 pc); 
extern int arm7tdmi_set_breakpt(u32 addr); 
extern int arm7tdmi_clr_breakpt(u32 addr); 
extern int arm7tdmi_set_watchpt(u32 addr); 
extern int arm7tdmi_clr_watchpt(u32 addr); 
 
 
extern int arm7tdmi_core_rd_all(void); 
extern int arm7tdmi_core_rd_reg(int reg_idx, u32 *cur_val); 
extern int arm7tdmi_core_wri_reg(int reg_idx, u32 new_val); 
 
 
extern int arm7tdmi_mem_rd8(u32 addr, u8* buf, int len); 
extern int arm7tdmi_mem_wri8(u32 addr, const u8* buf, int len); 
extern int arm7tdmi_mem_rd16(u32 addr, u16* buf, int len); 
extern int arm7tdmi_mem_wri16(u32 addr, const u16* buf, int len); 
extern int arm7tdmi_mem_rd32(u32 addr, u32 *buf, int len); 
extern int arm7tdmi_mem_wri32(u32 addr, const u32 *buf, int len); 
 
 
#endif  
/* end of arm7tdmi.h */