www.pudn.com > Sparten3Epaomadeng.rar > hdllib.ref

MO IBUFG NULL N:/J.30/rtf/verilog/src/unisims/IBUFG.v vlg.bin:8959518 1164799353 
MO dcm_sp_clock_lost NULL N:/J.30/rtf/verilog/src/unisims/DCM_SP.v vlg.bin:8539848 1164799227 
MO dcm_sp_maximum_period_check NULL N:/J.30/rtf/verilog/src/unisims/DCM_SP.v vlg.bin:8537587 1164799227 
MO DCM_SP NULL N:/J.30/rtf/verilog/src/unisims/DCM_SP.v vlg.bin:8442274 1164799227 
MO dcm_sp_clock_divide_by_2 NULL N:/J.30/rtf/verilog/src/unisims/DCM_SP.v vlg.bin:8533825 1164799227 
MO BUFG NULL N:/J.30/rtf/verilog/src/unisims/BUFG.v vlg.bin:8180430 1164799158