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********************************************************************************
* Copyright (C) 1999-2000 Texas Instruments Incorporated.
* All Rights Reserved
*------------------------------------------------------------------------------
* FILENAME...... csl_dat_.sa
* DATE CREATED.. 11/11/1999
* LAST MODIFIED. 10/03/2000
********************************************************************************
.include "csl_chiphal.inc"
.global _DAT_wait
.global _DAT_busy
.global _DAT_fill
.global _DAT_copy
.global _DAT_copy2d
.ref __DAT_serialTable
.ref __DAT_stateStruct
.if DAT_SUPPORT
.if DMA_SUPPORT
********************************************************************************
* DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT
* DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT
* DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT
* DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT
* DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT
* DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT
* DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT
* DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT
* DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT
* DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT
* DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT
* DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT DMA_SUPPORT
********************************************************************************
;DMA register offsets
PRICTL .set 0
SECCTL .set 2
SRC .set 4
DST .set 6
XFRCNT .set 8
;State structure, must match that in the C file
State .struct
useMask .word
baseAddr .word
gblcntAddr .word
gblidxAddr .word
initPrictl .word
.endstruct
*------------------------------------------------------------------------------*
* void DAT_wait(Uint32 id);
*------------------------------------------------------------------------------*
_DAT_wait .cproc id
.reg gieSave
.reg X
.reg slotNumber
.reg serialNumber
.reg tableAddr
.reg oldSerialNumber
.reg pred
.reg mask
.reg irfReg
.reg stateAddr
.reg useMask
;first let's check to see if this is the magic wait-for-all ID
CMPEQ id,-1,pred
[!pred] B DAT_WAIT_NORMAL
;at this point, the ID is the wait-for-all magic id
;this means we have to wait for ALL tranfers to complete
;Load useMask
MVKL __DAT_stateStruct,stateAddr
MVKH __DAT_stateStruct,stateAddr
LDW *stateAddr(State.useMask),useMask
DAT_WAIT_LOOP0:
;Wait until all mask bits appears in the IFR
MVC IFR,irfReg
AND useMask,irfReg,X
CMPEQ useMask,X,pred
[!pred] B DAT_WAIT_LOOP0
B DAT_WAIT_RETURN
DAT_WAIT_NORMAL:
;Extract slot number and serial number from id
MVKL 0x000000FF,X
MVKH 0x000000FF,X
AND id,X,slotNumber
SHRU id,16,serialNumber
;Load old serial number from table
MVKL __DAT_serialTable,tableAddr
MVKH __DAT_serialTable,tableAddr
LDHU *tableAddr[slotNumber],oldSerialNumber
;If the serial numbers don't match then return
CMPEQ serialNumber,oldSerialNumber,pred
[!pred] B DAT_WAIT_RETURN
;Generate IFR mask from slot number (mask = 1<>2)
SHL lineCnt,16,Y
SHRU lineLen,2,X
OR X,Y,X
STW X,*dmaBase[XFRCNT]
STW X,*gblcntAddr[0]
;Store primary control register
MVKL 0x00000001,Y
MVKH 0x00000001,Y
OR Y,initPrictl,Y
OR Y,type,Y
STW Y,*dmaBase[PRICTL]
;All done so go to procedure exit code
B DAT_COPY2D_RETURN
DAT_COPY2D_16:
;Check to see if 16-bit aligned, branch if not
CMPEQ alignment,2,pred
[!pred] B DAT_COPY2D_8
;Store global index reload register
;((linePitch-lineLen+2)<<16)|2
SUB linePitch,lineLen,X
ADD X,2,X
SHL X,16,X
OR X,2,X
STW X,*gblidxAddr[0]
;Store transfer count and reload (lineCnt<<16)|(lineLen>>1)
SHL lineCnt,16,Y
SHRU lineLen,1,X
OR X,Y,X
STW X,*dmaBase[XFRCNT]
STW X,*gblcntAddr[0]
;Store primary control register
MVKL 0x00000101,Y
MVKH 0x00000101,Y
OR Y,initPrictl,Y
OR Y,type,Y
STW Y,*dmaBase[PRICTL]
;All done so go to procedure exit code
B DAT_COPY2D_RETURN
DAT_COPY2D_8:
;Must be 8-bit aligned since it wasn't 32 or 16 bit aligned
;Store global index reload register
;((linePitch-lineLen+1)<<16)|1
SUB linePitch,lineLen,X
ADD X,1,X
SHL X,16,X
OR X,1,X
STW X,*gblidxAddr[0]
;Store transfer count and reload (lineCnt<<16)|(lineLen)
SHL lineCnt,16,X
OR X,lineLen,X
STW X,*dmaBase[XFRCNT]
STW X,*gblcntAddr[0]
;Store primary control register
MVKL 0x00000201,Y
MVKH 0x00000201,Y
OR Y,initPrictl,Y
OR Y,type,Y
STW Y,*dmaBase[PRICTL]
DAT_COPY2D_RETURN:
;Restore GIE
MVC CSR,X
OR X,gieSave,X
MVC X,CSR
.return id
.endproc
*------------------------------------------------------------------------------*
.endif ;DMA_SUPPORT
.if EDMA_SUPPORT
********************************************************************************
* EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT
* EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT
* EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT
* EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT
* EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT
* EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT
* EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT
* EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT
* EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT
* EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT
* EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT
* EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT EDMA_SUPPORT
********************************************************************************
;QDMA register offsets
OPT .set 8
SRC .set 1
CNT .set 2
DST .set 3
IDX .set 4
;state structure, must match that in the C file
State .struct
useMask .word
baseAddr .word
initOpt .word
.endstruct
*------------------------------------------------------------------------------*
* void DAT_wait(Uint32 id);
*------------------------------------------------------------------------------*
_DAT_wait .cproc id
.reg gieSave
.reg X
.reg slotNumber
.reg serialNumber
.reg tableAddr
.reg oldSerialNumber
.reg pred
.reg mask
.reg cipr
.reg ciprAddr
.reg stateAddr
.reg useMask
;first let's check to see if this is the magic wait-for-all ID
CMPEQ id,-1,pred
[!pred] B DAT_WAIT_NORMAL
;at this point, the ID is the wait-for-all magic id
;this means we have to wait for ALL tranfers to complete
;Load useMask
MVKL __DAT_stateStruct,stateAddr
MVKH __DAT_stateStruct,stateAddr
LDW *stateAddr(State.useMask),useMask
MVKL 0x01A0FFE4,ciprAddr
MVKH 0x01A0FFE4,ciprAddr
ZERO pred
DAT_WAIT_LOOP0:
;Wait until all mask bits appears in the CIPR
[!pred] LDW *ciprAddr,cipr
AND useMask,cipr,X
CMPEQ useMask,X,pred
[!pred] B DAT_WAIT_LOOP0
B DAT_WAIT_RETURN
DAT_WAIT_NORMAL:
;Extract slot number and serial number from id
; MVKL 0x000000FF,X
; MVKH 0x000000FF,X
; AND id,X,slotNumber
EXTU id,24,24,slotNumber
SHRU id,16,serialNumber
;Load old serial number from table
MVKL __DAT_serialTable,tableAddr
MVKH __DAT_serialTable,tableAddr
LDHU *tableAddr[slotNumber],oldSerialNumber
;If the serial numbers don't match then return
CMPEQ serialNumber,oldSerialNumber,pred
[!pred] B DAT_WAIT_RETURN
;Generate CIPR mask from slot number (mask = 1<