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library ieee; 
use ieee.std_logic_1164.all; 
 
entity detector is 
  port (   clk_f0: in std_logic; 
           --clk_2f0: in std_logic; 
           reset:     in std_logic; 
           data: in std_logic; 
           fast: out std_logic; 
           slow: out std_logic); 
end detector; 
 
architecture arc_detector of detector is 
   signal data_locked1 : std_logic; 
   signal data_locked2 : std_logic; 
    
   begin 
    
   process 
   begin 
     wait until clk_f0'event and clk_f0='1'; 
       data_locked1<=data; 
   end process; 
    
   process 
   begin 
     wait until clk_f0'event and clk_f0='0'; 
       data_locked2<=data;---data_locked1; 
   end process; 
    
   slow<=data xor data_locked1; 
   fast<=data_locked1 xor data_locked2; 
    
    
    
end arc_detector;