www.pudn.com > C8051F30x.rar > cryosc.asm
;-----------------------------------------------------------------------------
; cryosc.ASM
;-----------------------------------------------------------------------------
; Copyright 2001, Copyright (C) 2004 Silicon Laboratories, Inc.
;
; FILE: cryosc.ASM
; DEVICE: C8051F30x
; ASSEMBLER: Keil A51
; AUTH: BW
; DATE: 11 DEC 01
;
; This program provides an example of how to configure the C8051F30x device
; to operate from an external 22.1184MHz crystal attached to the XTAL1 and
; XTAL2 pins. Also enables Missing Clock Detector.
;
;-----------------------------------------------------------------------------
;-----------------------------------------------------------------------------
; EQUATES
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$INCLUDE (C8051F300.inc)
SYSCLK EQU 22118 ; SYSCLK frequency in kHz
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; VARIABLES
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;-------------------
; STACK
STACK SEGMENT IDATA ; declare STACK segment
RSEG STACK
DS 80h ; reserve 128 bytes for stack
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; MACRO DEFINITIONS
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;-----------------------------------------------------------------------------
; RESET AND INTERRUPT VECTOR TABLE
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CSEG AT 0
ljmp Main ; RESET vector
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; MAIN PROGRAM CODE
;-----------------------------------------------------------------------------
CRYOSC SEGMENT CODE ; declare CODE segment
RSEG CRYOSC ; select CODE segment
USING 0 ; using register bank 0
Main:
; Disable the WDT.
anl PCA0MD, #NOT(040h) ; clear Watchdog Enable bit
; Enable the Port I/O Crossbar
orl XBR0, #0ch ; skip XTAL pins in crossbar
; assignments
mov XBR2, #40h ; enable Crossbar
anl P0MDIN, #NOT(0ch) ; XTAL1 and XTAL2 are analog inputs
mov SP, #STACK-1 ; init stack pointer
mov OSCXCN, #67h ; enable external crystal
; oscillator at 22.1184MHz
clr A ; wait at least 1ms
djnz acc, $ ; wait ~340us
djnz acc, $ ; wait ~340us
djnz acc, $ ; wait ~340us
osc_wait: ; poll for XTLVLD-->1
mov a, OSCXCN
jnb acc.7, osc_wait
mov RSTSRC, #04h ; enable Missing Clock Detector
mov OSCICN, #08h ; select external oscillator as
; system clock source
sjmp $ ; spin forever
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; End of file.
END