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/*
 *  TU Eindhoven
 *  Eindhoven, The Netherlands
 *
 *  Name            :   brom64k.h
 *
 *  Author          :   A.S.Slusarczyk@tue.nl
 *
 *  Date            :   
 *
 *
 */
 
#ifndef BROM64K_H_INCLUDED
#define BROM64K_H_INCLUDED

#include "mips.h"
#include "mem64k.h"


// BlockRAM wrapper
SC_MODULE(BROM64KCONV) {
	sc_in <	sc_bv > addr;
	sc_out< sc_bv > dout;
	sc_in<	bool		 > clk;
	sc_in< sc_bv<1> > en;
	sc_out< bool > memwait;

	sc_out< sc_uint<32> > mem_addr;
	sc_in< sc_int<32> > mem_dout;
	sc_out< sc_int<32> > mem_din;
	sc_out< bool > mem_ww, mem_wb, mem_rw, mem_rb;
	sc_out< bool > mem_clk;	

	void in();
	void out();
	
	SC_CTOR(BROM64KCONV) {
	  
	  SC_METHOD(in);
	  sensitive << addr << en << clk;
	  
	  SC_METHOD(out);
	  sensitive << mem_dout;	  
	};
	
};


SC_MODULE(BROM64K) {
	sc_in <	sc_bv > addr;
	sc_out< sc_bv > dout;
	sc_in<	bool		 > clk;	

	sc_in< sc_bv<1> > en;
	sc_out< bool > memwait;

	MEM64K *memory;
	BROM64KCONV *conv;
		
	// independent access to the second set of ports for debugging
	sc_out > dbgDO;
	sc_in > dbgADDR;
	sc_in > dbgDI;
	sc_in dbgEN;
	sc_in dbgCLK;
	sc_in dbgWE;
	sc_in dbgRST;

	sc_signal< sc_uint<32> > mem_addr;
	sc_signal< sc_int<32> > mem_dout;
	sc_signal< sc_int<32> > mem_din;
	sc_signal< bool > mem_ww, mem_wb, mem_rw, mem_rb;
	sc_signal< bool > mem_clk;	

#ifndef VERILOG
	void mem_init(const char *filename, int size=ROMSIZE){
	  memory->mem_init(filename,size);
	}
	void mem_dump(const char *filename, int size=ROMSIZE){
	  memory->mem_dump(filename,size);
	}
#endif

	SC_CTOR(BROM64K) {
	  
	  memory = new MEM64K("memory");
	  conv = new BROM64KCONV("conv");
	  	  	  
	  conv->addr(addr);
	  conv->dout(dout);
	  conv->clk(clk);
	  conv->memwait(memwait);
	  conv->en(en);

	  conv->mem_addr(mem_addr);
	  conv->mem_dout(mem_dout);
	  conv->mem_din(mem_din);
	  conv->mem_ww(mem_ww);
	  conv->mem_wb(mem_wb);
	  conv->mem_rw(mem_rw);
	  conv->mem_rb(mem_rb);
	  conv->mem_clk(mem_clk);

	  memory->addr(mem_addr);
	  memory->dout(mem_dout);
	  memory->din(mem_din);
	  memory->ww(mem_ww);
	  memory->wb(mem_wb);
	  memory->rw(mem_rw);
	  memory->rb(mem_rb);
	  memory->clk(mem_clk);

	  memory->dbgDO(dbgDO);
	  memory->dbgADDR(dbgADDR);
	  memory->dbgDI(dbgDI);
	  memory->dbgEN(dbgEN);
	  memory->dbgCLK(dbgCLK);
	  memory->dbgWE(dbgWE);
	  memory->dbgRST(dbgRST);	  
	  
	};
};


#endif