www.pudn.com > noc.rar > benif.cpp
#include "benif.h"
void BENIF_WRAPPER::count()
{
if( RST.read() ) cnt = 0;
else cnt = cnt.read()+1;
}
void BENIF_WRAPPER::register_write()
{
sc_uint<8> reg = ADDRESS.read().range(7,0);
if( RST.read() ) {
addr = 0; memsel = 0; control = 0;
}
else if( WRITE_STROBE.read() )
{
switch(reg)
{
case 2 : memsel = DATA.read(); break;
case 3 : addr = DATA.read(); break;
case 4 : control = DATA.read(); break;
}
}
if( (READ_STROBE.read()||WRITE_STROBE.read()) && reg==5 ) addr = addr.read()+4;
}
void BENIF_WRAPPER::register_read()
{
sc_uint<8> reg = ADDRESS.read().range(7,0);
sc_int<32> memout;
sc_lv<32> dout;
sc_lv<32> z32;
sc_uint<32> mem = memsel.read();
for(int i=0;i<32;i++) z32[i]='z';
switch( mem ){
case 0x00000001 : memout = romDO.read(); break;
case 0x00000002 : memout = ramDO.read(); break;
default : memout = 0;
}
switch(reg)
{
case 2 : dout = memsel.read(); break;
case 3 : dout = addr.read(); break;
case 4 : dout = control.read(); break;
case 5 : dout = memout; break;
case 6 : dout = pc.read(); break;
default : dout = memout; break;
}
if( READ_STROBE.read() )
DATA.write( dout );
else {
DATA.write( z32 );
}
DMA_DATA.write( z32 );
}
void BENIF_WRAPPER::logic()
{
sc_bv<4> leds;
reset.write(RST.read());
enable.write(control.read()[0] != 0);
leds[3] = !(control.read()[0] != 0);
leds[2] = !(cnt.read()[24] != 0);
leds[1] = 1;
leds[0] = 1;
LEDS.write(leds);
INT.write(false);
DMA_REN.write(false);
DMA_WEN.write(false);
}
void BENIF_WRAPPER::memory_input()
{
sc_uint<8> reg = ADDRESS.read().range(7,0);
bool en = (reg==5);
bool we = (en&&WRITE_STROBE.read());
#ifndef VERILOG
memDI.write( we ? DATA.read() : 0 );
#else
memDI.write( DATA.read() );
#endif
romWE.write(we && memsel.read()[0]); ramWE.write(we && memsel.read()[1]);
memADDR.write( addr.read() );
memCLK.write( IFCLK.read() );
memEN.write(en);
memRST.write(false);
}