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;=========================================
; NAME: 2410INIT.S
; DESC: C start up codes
; Configure memory, ISR ,stacks
; Initialize C-variables
; HISTORY:
;=========================================
GET option.a
GET memcfg.a
GET 2410addr.a
BIT_SELFREFRESH EQU (1<<22)
;Pre-defined constants
USERMODE EQU 0x10
FIQMODE EQU 0x11
IRQMODE EQU 0x12
SVCMODE EQU 0x13
ABORTMODE EQU 0x17
UNDEFMODE EQU 0x1b
MODEMASK EQU 0x1f
NOINT EQU 0xc0
;The location of stacks
UserStack EQU (_STACK_BASEADDRESS-0x3800) ;0x31ff4800 ~
SVCStack EQU (_STACK_BASEADDRESS-0x2800) ;0x31ff5800 ~
UndefStack EQU (_STACK_BASEADDRESS-0x2400) ;0x31ff5c00 ~
AbortStack EQU (_STACK_BASEADDRESS-0x2000) ;0x31ff6000 ~
IRQStack EQU (_STACK_BASEADDRESS-0x1000) ;0x31ff7000 ~
FIQStack EQU (_STACK_BASEADDRESS-0x0) ;0x31ff8000 ~
GBLL THUMBCODE
THUMBCODE SETL {FALSE}
MACRO
MOV_PC_LR
[ THUMBCODE
bx lr
|
mov pc,lr
]
MEND
MACRO
MOVEQ_PC_LR
[ THUMBCODE
bxeq lr
|
moveq pc,lr
]
MEND
MACRO
$HandlerLabel HANDLER $HandleLabel
$HandlerLabel
sub sp,sp,#4 ;decrement sp(to store jump address)
stmfd sp!,{r0} ;PUSH the work register to stack(lr does't push because it return to original address)
ldr r0,=$HandleLabel;load the address of HandleXXX to r0
ldr r0,[r0] ;load the contents(service routine start address) of HandleXXX
str r0,[sp,#4] ;store the contents(ISR) of HandleXXX to stack
ldmfd sp!,{r0,pc} ;POP the work register and pc(jump to ISR)
MEND
IMPORT |Image$$RO$$Limit| ; End of ROM code (=start of ROM data)
IMPORT |Image$$RW$$Base| ; Base of RAM to initialise
IMPORT |Image$$ZI$$Base| ; Base and limit of area
IMPORT |Image$$ZI$$Limit| ; to zero initialise
IMPORT Main ; The main entry of mon program
;************************************************************************
AREA Init,CODE,READONLY
ENTRY
;1)The code, which converts to Big-endian, should be in little endian code.
;2)The following little endian code will be compiled in Big-Endian mode.
; The code byte order should be changed as the memory bus width.
;3)The pseudo instruction,DCD can't be used here because the linker generates error.
b ResetHandler
b HandlerUndef ;handler for Undefined mode
b HandlerSWI ;handler for SWI interrupt
b HandlerPabort ;handler for PAbort
b HandlerDabort ;handler for DAbort
b . ;reserved
b HandlerIRQ ;handler for IRQ interrupt
b HandlerFIQ ;handler for FIQ interrupt
;@0x20
b EnterPWDN
;Function for entering power down mode
; 1. SDRAM should be in self-refresh mode.
; 2. All interrupt should be maksked for SDRAM/DRAM self-refresh.
; 3. LCD controller should be disabled for SDRAM/DRAM self-refresh.
; 4. The I-cache may have to be turned on.
; 5. The location of the following code may have not to be changed.
;void EnterPWDN(int CLKCON);
EnterPWDN
mov r2,r0 ;r2=rCLKCON
tst r0,#0x8 ;POWER_OFF mode?
bne ENTER_POWER_OFF
ENTER_STOP
ldr r0,=REFRESH
ldr r3,[r0] ;r3=rREFRESH
mov r1, r3
orr r1, r1, #BIT_SELFREFRESH
str r1, [r0] ;Enable SDRAM self-refresh
mov r1,#16 ;wait until self-refresh is issued. may not be needed.
0 subs r1,r1,#1
bne %B0
ldr r0,=CLKCON ;enter STOP mode.
str r2,[r0]
mov r1,#32
0 subs r1,r1,#1 ;1) wait until the STOP mode is in effect.
bne %B0 ;2) Or wait here until the CPU&Peripherals will be turned-off
; Entering POWER_OFF mode, only the reset by wake-up is available.
ldr r0,=REFRESH ;exit from SDRAM self refresh mode.
str r3,[r0]
MOV_PC_LR
ENTER_POWER_OFF
;NOTE.
;1) rGSTATUS3 should have the return address after wake-up from POWER_OFF mode.
ldr r0,=REFRESH
ldr r1,[r0] ;r1=rREFRESH
orr r1, r1, #BIT_SELFREFRESH
str r1, [r0] ;Enable SDRAM self-refresh
mov r1,#16 ;Wait until self-refresh is issued,which may not be needed.
0 subs r1,r1,#1
bne %B0
ldr r1,=MISCCR
ldr r0,[r1]
orr r0,r0,#(7<<17) ;Make sure that SCLK0:SCLK->0, SCLK1:SCLK->0, SCKE=L during boot-up
str r0,[r1]
ldr r0,=CLKCON
str r2,[r0]
b . ;CPU will die here.
WAKEUP_POWER_OFF
;Release SCLKn after wake-up from the POWER_OFF mode.
ldr r1,=MISCCR
ldr r0,[r1]
bic r0,r0,#(7<<17) ;SCLK0:0->SCLK, SCLK1:0->SCLK, SCKE:L->H
str r0,[r1]
;Set memory control registers
ldr r0,=SMRDATA
ldr r1,=BWSCON ;BWSCON Address
add r2, r0, #52 ;End address of SMRDATA
0
ldr r3, [r0], #4
str r3, [r1], #4
cmp r2, r0
bne %B0
mov r1,#256
0 subs r1,r1,#1 ;1) wait until the SelfRefresh is released.
bne %B0
ldr r1,=GSTATUS3 ;GSTATUS3 has the start address just after POWER_OFF wake-up
ldr r0,[r1]
mov pc,r0
LTORG
HandlerFIQ HANDLER HandleFIQ
HandlerIRQ HANDLER HandleIRQ
HandlerUndef HANDLER HandleUndef
HandlerSWI HANDLER HandleSWI
HandlerDabort HANDLER HandleDabort
HandlerPabort HANDLER HandlePabort
;************************************************************
IsrIRQ
sub sp,sp,#4 ;reserved for PC
stmfd sp!,{r8-r9}
ldr r9,=INTOFFSET ;0x4A000014
ldr r9,[r9] ;Indicate the IRQ source
ldr r8,=HandleEINT0
add r8,r8,r9,lsl #2 ;Point to right IRQ table
ldr r8,[r8]
str r8,[sp,#8]
ldmfd sp!,{r8-r9,pc}
;************************************************************
; Power ON ENTRY
;************************************************************
ResetHandler
ldr r0,=WTCON ;watch dog disable
ldr r1,=0x0
str r1,[r0]
ldr r0,=INTMSK
ldr r1,=0xffffffff ;all interrupt disable
str r1,[r0]
ldr r0,=EINTMASK
ldr r1,=0x00fffff0 ;all interrupt disable (EINT4-23)
str r1,[r0]
ldr r0,=INTSUBMSK
ldr r1,=0x3ff ;all sub interrupt disable
str r1,[r0]
ldr r0,=INTMOD
ldr r1,=0x00 ;all IRQ mode, no FIQ
str r1,[r0]
[ {FALSE}
; rGPFDAT = (rGPFDAT & ~(0xf<<4)) | ((~data & 0xf)<<4);
; Led_Display
ldr r0,=GPFCON
ldr r1,=0x5500
str r1,[r0]
ldr r0,=GPFDAT
ldr r1,=0x10
str r1,[r0]
]
;To reduce PLL lock time, adjust the LOCKTIME register.
ldr r0,=LOCKTIME
ldr r1,=0xffffff
str r1,[r0]
[ PLL_ON_START
;Configure MPLL, Power on start, FCLK = 50MHz
ldr r0,=MPLLCON
ldr r1,=((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV) ;Fin=12MHz,Fout=50MHz
str r1,[r0]
]
;Check if the boot is caused by the wake-up from POWER_OFF mode.
ldr r1,=GSTATUS2
ldr r0,[r1]
tst r0,#0x2
;In case of the wake-up from POWER_OFF mode, go to POWER_OFF_WAKEUP handler.
bne WAKEUP_POWER_OFF
EXPORT StartPointAfterPowerOffWakeUp
StartPointAfterPowerOffWakeUp
;*****************************************************************************
;Set memory control registers {BWSCON,BANKCON0-7,REFRESH,BANKSIZE,MRSRB6-7} **
;*****************************************************************************
ldr r0,=SMRDATA
ldr r1,=BWSCON ;BWSCON Address
add r2, r0, #52 ;End address of SMRDATA
0
ldr r3, [r0], #4
str r3, [r1], #4
cmp r2, r0
bne %B0
;Initialize stacks
bl InitStacks
;***************************************************************
; Setup IRQ handler
;***************************************************************
ldr r0,=HandleIRQ ;This routine is needed
ldr r1,=IsrIRQ ;if there isn't 'subs pc,lr,#4' at 0x18, 0x1c
str r1,[r0]
;Copy and paste RW data/zero initialized data
ldr r0, =|Image$$RO$$Limit| ; End address of Read only area
ldr r1, =|Image$$RW$$Base| ;Start address of Read/Write area
ldr r3, =|Image$$ZI$$Base| ;Start address of area which will be clear
;Zero init base => top of initialised data
cmp r0, r1 ; Check that they are different
beq %F2
1
cmp r1, r3 ; Copy init data
ldrcc r2, [r0], #4 ;--> LDRCC r2, [r0] + ADD r0, r0, #4
strcc r2, [r1], #4 ;--> STRCC r2, [r1] + ADD r1, r1, #4
bcc %B1
2
ldr r1, =|Image$$ZI$$Limit| ; Top of zero init segment
mov r2, #0
3
cmp r3, r1 ; Zero init
strcc r2, [r3], #4
bcc %B3
bl Main ;Don't use main() because ......;Jump to Main() at "2410mon.C"
b . ;Die loop
;********************
;Initialize stacks *
;function initializing stacks *
;********************
InitStacks
;Don't use DRAM,such as stmfd,ldmfd......
;SVCstack is initialized before
;Under toolkit ver 2.5, 'msr cpsr,r1' can be used instead of 'msr cpsr_cxsf,r1'
mrs r0,cpsr
bic r0,r0,#MODEMASK
orr r1,r0,#UNDEFMODE|NOINT
msr cpsr_cxsf,r1 ;UndefMode
ldr sp,=UndefStack
orr r1,r0,#ABORTMODE|NOINT
msr cpsr_cxsf,r1 ;AbortMode
ldr sp,=AbortStack
orr r1,r0,#IRQMODE|NOINT
msr cpsr_cxsf,r1 ;IRQMode
ldr sp,=IRQStack
orr r1,r0,#FIQMODE|NOINT
msr cpsr_cxsf,r1 ;FIQMode
ldr sp,=FIQStack
bic r0,r0,#MODEMASK|NOINT
orr r1,r0,#SVCMODE
msr cpsr_cxsf,r1 ;SVCMode
ldr sp,=SVCStack
;USER mode has not be initialized.
mov pc,lr
;The LR register won't be valid if the current mode is not SVC mode.
LTORG
SMRDATA DATA
; Memory configuration should be optimized for best performance
; The following parameter is not optimized.
; Memory access cycle parameter strategy
; 1) The memory settings is safe parameters even at HCLK=75Mhz.
; 2) SDRAM refresh period is for HCLK=75Mhz.
DCD (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
;Bus Width & Wait Status Control, BWSCON=0x48000000
DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) ;GCS0, BANKCON0=0x48000004
DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) ;GCS1, BANKCON1=0x48000008
DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) ;GCS2, BANKCON2=0x4800000C
DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) ;GCS3, BANKCON3=0x48000010
DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) ;GCS4, BANKCON4=0x48000014
DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) ;GCS5, BANKCON5=0x48000018
DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) ;GCS6, BANKCON6=0x4800001C
DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) ;GCS7, BANKCON7=0x48000020
DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) ;REFRESH = 0x48000024
DCD 0x32 ;SCLK power saving mode, BANKSIZE 128M/128M
DCD 0x30 ;MRSR6 CL=3clk
DCD 0x30 ;MRSR7
; DCD 0x20 ;MRSR6 CL=2clk
; DCD 0x20 ;MRSR7
ALIGN
;**********************************************************************
; Reserved necessary bytes for interrupt vercter table
;**********************************************************************
AREA RamData, DATA, READWRITE
^ _ISR_STARTADDRESS ;Storeg Map from address "_ISR_STARTADRESS"
HandleReset # 4 ;pISR_RESET =_ISR_STARTADDRESS
HandleUndef # 4 ;pISR_SWI =_ISR_STARTADDRESS+4
HandleSWI # 4 ;pISR_SWI =_ISR_STARTADDRESS+8
HandlePabort # 4 ;pISR_PABORT =_ISR_STARTADDRESS+12
HandleDabort # 4 ;pISR_DABORT =_ISR_STARTADDRESS+16
HandleReserved # 4 ;pISR_RESERVED =_ISR_STARTADDRESS+20
HandleIRQ # 4 ;pISR_IRQ =_ISR_STARTADDRESS+24
HandleFIQ # 4 ;pISR_FIQ =_ISR_STARTADDRESS+28
;***********************************************************************
;Don't use the label 'IntVectorTable',
;The value of IntVectorTable is different with the address you think it may be.
;IntVectorTable
;The order is based on P14-15 list, the sequence is fixed.
;***********************************************************************
HandleEINT0 # 4 ;pISR_EINT0 =_ISR_STARTADDRESS+32
HandleEINT1 # 4 ;pISR_EINT1 =_ISR_STARTADDRESS+36
HandleEINT2 # 4 ;pISR_EINT2 =_ISR_STARTADDRESS+40
HandleEINT3 # 4 ;pISR_EINT3 =_ISR_STARTADDRESS+44
HandleEINT4_7 # 4 ;pISR_EINT4_7 =_ISR_STARTADDRESS+48
HandleEINT8_23 # 4 ;pISR_EINT8_23 =_ISR_STARTADDRESS+52
HandleRSV6 # 4 ;pISR_NOTUSED6 =_ISR_STARTADDRESS+56
HandleBATFLT # 4 ;pISR_BAT_FLT =_ISR_STARTADDRESS+60
HandleTICK # 4 ;pISR_TICK =_ISR_STARTADDRESS+64
HandleWDT # 4 ;pISR_WDT =_ISR_STARTADDRESS+68
HandleTIMER0 # 4 ;pISR_TIMER0 =_ISR_STARTADDRESS+72
HandleTIMER1 # 4 ;pISR_TIMER1 =_ISR_STARTADDRESS+76
HandleTIMER2 # 4 ;pISR_TIMER2 =_ISR_STARTADDRESS+80
HandleTIMER3 # 4 ;pISR_TIMER3 =_ISR_STARTADDRESS+84
HandleTIMER4 # 4 ;pISR_TIMER4 =_ISR_STARTADDRESS+88
HandleUART2 # 4 ;pISR_UART2 =_ISR_STARTADDRESS+92
HandleLCD # 4 ;pISR_LCD =_ISR_STARTADDRESS+96
HandleDMA0 # 4 ;pISR_DMA0 =_ISR_STARTADDRESS+100
HandleDMA1 # 4 ;pISR_DMA1 =_ISR_STARTADDRESS+104
HandleDMA2 # 4 ;pISR_DMA2 =_ISR_STARTADDRESS+108
HandleDMA3 # 4 ;pISR_DMA3 =_ISR_STARTADDRESS+112
HandleMMC # 4 ;pISR_SDI =_ISR_STARTADDRESS+116
HandleSPI0 # 4 ;pISR_SPI0 =_ISR_STARTADDRESS+120
HandleUART1 # 4 ;pISR_UART1 =_ISR_STARTADDRESS+124
HandleRSV24 # 4 ;pISR_NOTUSED24 =_ISR_STARTADDRESS+128
HandleUSBD # 4 ;pISR_USBD =_ISR_STARTADDRESS+132
HandleUSBH # 4 ;pISR_USBH =_ISR_STARTADDRESS+136
HandleIIC # 4 ;pISR_IIC =_ISR_STARTADDRESS+140
HandleUART0 # 4 ;pISR_UART0 =_ISR_STARTADDRESS+144
HandleSPI1 # 4 ;pISR_SPI1 =_ISR_STARTADDRESS+148
HandleRTC # 4 ;pISR_RTC =_ISR_STARTADDRESS+152
HandleADC # 4 ;pISR_ADC =_ISR_STARTADDRESS+156
END