www.pudn.com > Blackfin_Mpeg_2_4.zip > test_isadct.c

/******************************************************************************* 
Copyright(c) 2000 - 2002 Analog Devices. All Rights Reserved. 
Developed by Joint Development Software Application Team, IPDC, Bangalore, India 
for Blackfin DSPs  ( Micro Signal Architecture 1.0 specification). 
 
By using this module you agree to the terms of the Analog Devices License 
Agreement for DSP Software.  
******************************************************************************* 
File name   : test_isadct.c 
Description : This module tests isadct() routine. 
******************************************************************************/ 
#include 
#include "InterlacedSACOStrans.h" 
#include "input1.h" /*Input to the inverse SADCT*/ 
 
int error_flag = 0; 
void (*f1)(); 
int cycle_count[10]; 
 
void _isadct(); 
 
main() 
{ 
 
    int i,j; 
 
    f1 = _isadct; 
 
//Test case 1 
 
    for(i=0;i<8;i++) 
        for(j=0;j<8;j++) 
        { 
            if((i+j)>6) 
            { 
                data[i*8+j]=(i+1)*(30-j); 
                shape[i*8+j]=255; 
            } 
            else 
            { 
                data[i*8+j]=0; 
                shape[i*8+j]=0; 
            } 
        } 
 
    cycle_count[0] = Compute_Cycle_Count(&exp_out,&shape,&out,&coeff_tans); 
                            //This function inturn calls isadct() 
 
    for(i=0;i<8;i++) 
    { 
        for(j=0;j<8;j++) 
            if(abs(out[i*8+j]-data[i*8+j]) > MAX_PERMISSIBLE_ERROR) 
            { 
                error_flag = error_flag | 1; 
            } 
    } 
 
    #ifdef PRINTF_SUPPORT 
        if(error_flag & 1) 
            printf("Test Case 1 failed\n"); 
        else 
            printf("Test Case 1 passed\n"); 
    #endif 
     
    printf("cycle_count[0]=%d\n",cycle_count[0]); 
     
}